C.SRLI
Compressed Shift Right Logical Immediate
C.SRLI rd', imm
Logically shifts a register right by immediate.
Encoding
Binary Layout
?
31:16
100
15:13
c_nzuimm6hi
12
00
11:10
rd_rs1_p
9:7
c_nzuimm6lo
6:2
01
1:0
Operands
-
rd'
Dest/Source (x8-x15) -
imm
Shift Amount
Example
C.SRLI x8, 2
// x8 = x8 >> 2
Related
More in C
Reference
View in RISC-V Unprivileged ISA Specification ↗
RISC-V ISA Manual
Description
Logical right shift of rd′ by a 5-bit immediate.
Operation
R[rd'] = R[rd'] >> imm;