MULHU

Multiply High Unsigned

MULHU rd, rs1, rs2

Performs unsigned multiplication and returns the upper XLEN bits.

Encoding

Binary Layout

0000001

31:25

rs2

24:20

rs1

19:15

011

14:12

rd

11:7

0110011

6:0

 

Format R-Type

Opcode 0x02003033

Extension M

Operands

• rd
  Dest (Upper Bits)
• rs1
  Source register 1 (integer)
• rs2
  Source register 2 (integer)

Example

MULHU t0, a0, a1

Related

More in M

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

MULHU multiplies rs1 and rs2 as unsigned values and writes the upper XLEN bits of the product to rd.

Operation

R[rd] = (R[rs1] *u R[rs2]) >> XLEN;