DIV

Divide

DIV rd, rs1, rs2

Performs signed integer division.

Encoding

Binary Layout

0000001

31:25

rs2

24:20

rs1

19:15

100

14:12

rd

11:7

0110011

6:0

 

Format R-Type

Opcode 0x02004033

Extension M

Operands

• rd
  Dest (Quotient)
• rs1
  Dividend
• rs2
  Divisor

Example

DIV x10, x11, x12

// Signed division of x11 by x12.

Related

Across architectures

Integer Divide : how x86, ARM, RISC-V, and PowerISA each do this.

More in M

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

DIV divides rs1 by rs2 using signed division and writes the quotient to rd, truncated toward zero. Division by zero yields -1; overflow (INT_MIN ÷ -1) yields INT_MIN.

Operation

R[rd] = R[rs1] / R[rs2];