VSM.V

Vector Store Mask

VSM.V vs3, (rs1)

Stores a vector mask register to memory.

Details

Performs a vector mask register store of element-sized-bit elements from/to memory. The number of elements transferred is determined by vl. Masking is controlled by vm.

Pseudocode Operation

StoreMask(rs1, vs3);

Example

VSM.V v6, a0

Encoding

Binary Layout
000000
31:26
01011
25:21
1
20
rs1
19:15
000
14:12
vs3
11:7
0100111
6:0
 
Format VS-Type
Opcode 0x27
Extension V

Operands

  • vs3
    Src Mask
  • rs1
    Base Address