VSETVL
Vector Set VL
VSETVL rd, rs1, rs2
Sets the vector length (VL) based on the application vector length (AVL) in rs1 and configuration in rs2.
Encoding
Binary Layout
1000000
31:25
rs2
24:20
rs1
19:15
111
14:12
rd
11:7
1010111
6:0
Operands
-
rd
Dest (New VL) -
rs1
AVL -
rs2
Config (VTYPE)
Example
VSETVL t0, a0, a1
Related
More in V
Reference
View in RISC-V Unprivileged ISA Specification ↗
RISC-V ISA Manual
Description
Sets the vector length (vl) and vector type (vtype) registers based on the requested application vector length (AVL) and element width/grouping. The actual vector length set is written to rd. vtype encodes SEW (element width), LMUL (register grouping), and tail/mask policies.
Operation
vl = set_config(rs1, rs2); R[rd] = vl;