VSETVLI
Vector Set VL Immediate
VSETVLI rd, rs1, vtypei
Configures the vector length (vl) and vector type (vtype) based on application needs.
Encoding
Binary Layout
0
31
zimm11
30:20
rs1
19:15
111
14:12
rd
11:7
1010111
6:0
Operands
-
rd
Dest (Actual VL) -
rs1
Req VL (Avail) -
vtypei
Config (SEW/LMUL)
Example
VSETVLI t0, a0, e32, m1, ta, ma
// Request VL=a0, 32-bit elements, 1 register group.
Related
More in V
Reference
View in RISC-V Unprivileged ISA Specification ↗
RISC-V ISA Manual
Description
Sets the vector length (vl) and vector type (vtype) registers based on the requested application vector length (AVL) and element width/grouping. The actual vector length set is written to rd. vtype encodes SEW (element width), LMUL (register grouping), and tail/mask policies.
Operation
vl = set_config(rs1, vtypei); R[rd] = vl;