VSSEG3E8.V

Vector Store Segment (3 fields, 8-bit)

VSSEG3E8.V vs3, (rs1), vm

Stores 3 vector registers (e.g., RGB) into memory as interleaved 8-bit fields.

Details

Performs a vector strided store of 3-bit elements from/to memory. The number of elements transferred is determined by vl. Masking is controlled by vm.

Pseudocode Operation

Store 3 vector registers as interleaved 8-bit fields.

Example

VSSEG3E8.V v6, a0, v0.t

Encoding

Binary Layout
000110
31:26
00101
25:21
vm
20
rs1
19:15
000
14:12
vs3
11:7
0100111
6:0
 
Format VS-Type
Opcode 0x27
Extension V

Operands

  • vs3
    Src Group (3 regs)
  • rs1
    Base Addr