VCOMPRESS.VM

Vector Compress

VCOMPRESS.VM vd, vs2, vs1

Compacts elements from source vector into contiguous elements in dest where the mask is 1.

Encoding

Binary Layout

0101111

31:25

vs2

24:20

vs1

19:15

010

14:12

vd

11:7

1010111

6:0

 

Format OPMVV

Opcode 0x5E002057

Extension V

Operands

• vd
  Destination vector register
• vs2
  Source
• vs1
  Mask

Example

VCOMPRESS.VM v1, v4, v2

Related

More in V

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

Compresses active (masked) elements of vs2 into the low elements of vd, discarding masked-off elements.

Operation

idx = 0; foreach(i < vl): if vs1[i]: vd[idx++] = vs2[i];