VSHA2MS.VV

Vector SHA-2 Message Schedule

VSHA2MS.VV vd, vs2, vs1

Generates SHA-256 message schedule words.

Details

Performs a vectorised SHA cryptographic round operation. Each element group undergoes one step of the cipher algorithm in parallel. See the Zvk vector crypto extension for full semantic details.

Pseudocode Operation

vd = SHA256_MsgSched(vd, vs1, vs2);

Example

VSHA2MS.VV v1, v4, v2

Encoding

Binary Layout
101100
31:26
1
25
vs2
24:20
vs1
19:15
010
14:12
vd
11:7
1010111
6:0
 
Format OPIVV
Opcode 0x57
Extension Zvknha

Operands

  • vd
    Destination vector register
  • vs2
    Source vector register 2
  • vs1
    Source vector register 1