CSRS

Control Status Register Set

CSRS csr, rs

Sets bits in a CSR (bitwise OR).

Encoding

Binary Layout

csr

31:20

rs1

19:15

010000001110011

14:0

 

Format I-Type

Opcode 0x00002073

Extension Pseudo

Operands

• csr
  CSR Address
• rs
  Bit Mask

Example

CSRS sstatus, x5

// Set bits in sstatus.

Related

More in Pseudo

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

CSRS is an assembler pseudoinstruction for CSRRS x0, csr, rs1. It sets bits in the CSR based on rs1 without reading.

Operation

CSRs[csr] |= R[rs];