HLV.W

Hypervisor Load Word

HLV.W rd, (rs1)

Loads a word from Guest Physical Memory (VS-stage translation only).

Encoding

Binary Layout

011010000000

31:20

rs1

19:15

100

14:12

rd

11:7

1110011

6:0

 

Format R-Type (System)

Opcode 0x68004073

Extension H

Operands

• rd
  Destination register (integer)
• rs1
  Guest Address

Example

HLV.W x10, (x11)

// Read word from guest memory.

Related

More in H

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

HLV.W performs a virtual-machine load of a word using VS-mode translation. In RV64 the result is sign-extended.

Operation

R[rd] = sext(GuestMem[R[rs1]][31:0]);