ADDIW

Add Immediate Word

ADDIW rd, rs1, imm

Adds a 12-bit immediate to a register (32-bit arithmetic) and sign-extends to 64 bits.

Details

ADDIW adds the sign-extended 12-bit immediate to rs1, truncates to 32 bits, sign-extends to 64 bits, and writes to rd. Arithmetic overflow is ignored.

Pseudocode Operation

R[rd] = sext((R[rs1] + sext(imm))[31:0]);

Example

ADDIW x5, x6, 5

Encoding

Binary Layout
imm[11:0]
31:20
rs1
19:15
000
14:12
rd
11:7
0011011
6:0
 
Format I-Type
Opcode 0x1B
Extension RV64I

Operands

  • rd
    Destination Register
  • rs1
    Source Register
  • imm
    12-bit Signed Immediate