VSRL.VI
Vector Shift Right Logical Immediate
VSRL.VI vd, vs2, imm, vm
Shifts elements right (logical) by immediate.
Details
Performs element-wise right logical shift on a vector and an immediate, writing results to vd. The number of elements processed is determined by vl, and masking is controlled by vm.
Pseudocode Operation
vd = vs2 >>u imm;
Example
VSRL.VI v1, v4, 16, v0.t
Encoding
Binary Layout
101000
31:26
vm
25
vs2
24:20
imm
011
19:17
vd
16:12
1010111
11:5
Operands
-
vd
Destination vector register -
vs2
Source vector register 2 -
imm
Signed immediate value