VSHA2CH.VV

Vector SHA-2 Compress High

VSHA2CH.VV vd, vs2, vs1

Performs SHA-256 compression (high 128 bits).

Encoding

Binary Layout

1011101

31:25

vs2

24:20

vs1

19:15

010

14:12

vd

11:7

1110111

6:0

 

Format OPIVV

Opcode 0xBA002077

Extension Zvknha

Operands

• vd
  State
• vs2
  Message
• vs1
  State B

Example

VSHA2CH.VV v1, v4, v2

Related

More in Zvknha

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

Performs a vectorised SHA cryptographic round operation. Each element group undergoes one step of the cipher algorithm in parallel. See the Zvk vector crypto extension for full semantic details.

Operation

vd = SHA256_Compress_High(vd, vs1, vs2);