PowerISA Instructions
1187 instructions - showing 100 per page, page 10 of 12 - click any row to view encoding, pseudocode, and full documentation.
| Mnemonic | Syntax | Format | Extension | Summary |
|---|---|---|---|---|
| vsubcuq | vsubcuq vD, vA, vB | VX-form | VMX (AltiVec) | Subtracts the contents of two vector registers, adds one, and writes the carry-out to another register. |
| vsubcuw | vsubcuw vD, vA, vB | VX-form | VMX (AltiVec) | Subtracts the unsigned integer values in word elements of two vector registers and writes the result to another vector register, along with the carry-out. |
| vsubfp | vsubfp vD, vA, vB | VA-form | VMX (AltiVec) | Subtracts four single-precision floats (Classic VMX). |
| vsubsbs | vsubsbs vD, vA, vB | VX-form | VMX (AltiVec) | Subtracts 16 signed bytes with saturation. |
| vsubshs | vsubshs vD, vA, vB | VX-form | VMX (AltiVec) | Subtracts the contents of two vector registers and saturates the result to halfword elements. |
| vsubsws | vsubsws vD, vA, vB | VX-form | VMX (AltiVec) | Subtracts 4 signed words with saturation. |
| vsububm | vsububm vD, vA, vB | VX-form | VMX (AltiVec) | Subtracts the contents of two vector registers and updates the result in another vector register using modulo operation for bytes. |
| vsububs | vsububs vD, vA, vB | VX-form | VMX (AltiVec) | Subtracts the contents of two vector registers and saturates the result to zero if it underflows. |
| vsubudm | vsubudm vD, vA, vB | VX-form | VMX (AltiVec) | Subtracts the contents of two vector registers and places the result in a third vector register, modulo operation. |
| vsubuhm | vsubuhm vD, vA, vB | VX-form | VMX (AltiVec) | Subtracts 8 halfwords modulo 65536. |
| vsubuhs | vsubuhs vD, vA, vB | VX-form | VMX (AltiVec) | Subtracts 8 unsigned halfwords with saturation. |
| vsubuqm | vsubuqm vD, vA, vB | VA-form | VMX (AltiVec) | Subtracts the contents of two vector registers and places the result in another vector register, modulo operation. |
| vsubuwm | vsubuwm vD, vA, vB | VA-form | VMX (AltiVec) | Subtracts the contents of two vector registers and updates the result in another vector register. |
| vsubuws | vsubuws vD, vA, vB | VX-form | VMX (AltiVec) | Subtracts the contents of two vector registers and saturates the result if it underflows. |
| vsum2sws | vsum2sws vD, vA, vB | VA-form | VMX (AltiVec) | Adds the contents of two vector registers and updates the saturation flag. |
| vsum4sbs | vsum4sbs vD, vA, vB | VA-form | VMX (AltiVec) | Adds the contents of four signed byte elements from two vector registers and saturates the result. |
| vsum4shs | vsum4shs vD, vA, vB | VA-form | VMX (AltiVec) | Sums every 2 halfwords into a word. |
| vsum4ubs | vsum4ubs vD, vA, vB | VA-form | VMX (AltiVec) | Sums the unsigned byte elements of two vector registers and saturates the result. |
| vsumsws | vsumsws vD, vA, vB | VA-form | VMX (AltiVec) | Adds the contents of four word elements of one vector register to a single word element of another vector register and saturates the result. |
| vupkhpx | vupkhpx vD, vB | VX-form | VMX (AltiVec) | Unpacks high 4 pixels to 4 words. |
| vupkhsb | vupkhsb vD, vB | VX-form | VMX (AltiVec) | Unpacks the high signed byte from each element of a vector register into halfwords of another vector register. |
| vupkhsh | vupkhsh vD, vB | VX-form | VMX (AltiVec) | Unpacks the high signed halfwords from a vector register into a new vector register. |
| vupkhsw | vupkhsw VRT,VRB | VX-form | VMX (AltiVec) | Unpacks the high signed words from a vector register into a doubleword format. |
| vupklpx | vupklpx vD, vB | VX-form | VMX (AltiVec) | Unpacks low 4 pixels to 4 words. |
| vupklsb | vupklsb vD, vB | VX-form | VMX (AltiVec) | Unpacks low 8 signed bytes to 8 signed halfwords. |
| vupklsh | vupklsh vD, vB | VX-form | VMX (AltiVec) | Unpacks low 4 signed halfwords to 4 signed words. |
| vxor | vxor vD, vA, vB | VX-form | VMX (AltiVec) | Bitwise XOR of two 128-bit vectors. |
| wait | wait WC,PL | X-form | Base | Stops instruction execution and places the processor in a lower power state until an interrupt occurs. |
| waitimpl | waitimpl | X-form | Base | Waits for a specific implementation event. |
| waitrsv | waitrsv | X-form | Base | Waits until a reservation is lost (Multithreading sync). |
| wrtee | wrtee RS | X-form | Embedded | Updates the EE bit of the MSR from a GPR. |
| wrteei | wrteei E | X-form | Embedded | Updates the EE bit of the MSR from an immediate. |
| xmsubasp | xmsubasp XT,XA,XB | XX3-form | VSX | Performs a multiply-subtract operation on single-precision floating-point values. |
| xor | xor RA, RS, RB | X-form | Base | Performs a bitwise Exclusive OR comparison. |
| xori | xori RA, RS, UI | D-form | Base | Performs a bitwise XOR with a 16-bit unsigned immediate. |
| xoris | xoris RA, RS, UI | D-form | Base | Performs a bitwise XOR with a 16-bit immediate shifted left by 16 bits. |
| xsabsdp | xsabsdp XT, XB | XX2-form | VSX | Computes the absolute value of a double-precision floating-point number. |
| xsabsqp | xsabsqp vD, vB | X-form | VSX | Computes the absolute value of a quad-precision floating-point number. |
| xsadddp | xsadddp XT, XA, XB | XX3-form | VSX | Adds two double-precision floating-point values from vector scalar registers and stores the result in a target vector scalar register. |
| xsaddqp | xsaddqp vD, vA, vB | X-form | VSX | Adds two 128-bit Quad-Precision floating-point numbers held in VSX registers (pairs). |
| xsaddqpo | xsaddqpo vD, vA, vB | X-form | VSX | Used for Quad-Precision arithmetic on hardware that splits quads. |
| xsaddsp | xsaddsp XT, XA, XB | XX3-form | VSX | Adds the contents of two single-precision floating-point numbers and places the result in a double-precision format. |
| xscmpeqdp | xscmpeqdp XT,XA,XB | XX3-form | VSX | Compares two double-precision floating-point values and sets the target vector register based on equality. |
| xscmpeqqp | xscmpeqqp VRT,VRA,VRB | X-form | VSX | Compares two quad-precision floating-point values and sets the target vector register to all 1s if they are equal, otherwise all 0s. |
| xscmpexpdp | xscmpexpdp BF, XA, XB | XX3-form | VSX | Compares the exponents of two double-precision floating-point values in VSX registers and updates the condition register. |
| xscmpexpqp | xscmpexpqp BF, vA, vB | X-form | VSX | Compares the exponents of two quad-precision floating-point values and updates the condition register. |
| xscmpgedp | xscmpgedp XT,XA,XB | XX3-form | VSX | Compares two double-precision floating-point values and sets the target vector register based on the comparison result. |
| xscmpgeqp | xscmpgeqp VRT,VRA,VRB | X-form | VSX | Compares two quad-precision floating-point values and sets the target register based on the comparison. |
| xscmpgtdp | xscmpgtdp XT,XA,XB | XX3-form | VSX | Compares two double-precision floating-point values and sets the target vector register based on the comparison. |
| xscmpgtqp | xscmpgtqp VRT,VRA,VRB | X-form | VSX | Compares two quad-precision floating-point values and sets the target vector register to all 1s if the first value is greater than the second, otherwise all 0s. |
| xscmpodp | xscmpodp BF, XA, XB | XX3-form | VSX | Compares two double-precision floating-point values and sets the condition register based on the comparison. |
| xscmpopoqp | xscmpopoqp BF, vA, vB | X-form | VSX | Compares Quad floats (Signaling on NaN). |
| xscmpoqp | xscmpoqp BF,VRA,VRB | X-form | VSX | Compares two quad-precision floating-point values and updates the condition register. |
| xscmpudp | xscmpudp BF, XA, XB | XX3-form | VSX | Compares two double-precision floating-point values and sets the condition register based on the comparison. |
| xscmpuqp | xscmpuqp BF, vA, vB | X-form | VSX | Compares two quad-precision floating-point values and updates the condition register. |
| xscpsgndp | xscpsgndp XT,XA,XB | X-form | VSX | Copies the sign of a double-precision floating-point value from one register to another. |
| xscpsgnqp | xscpsgnqp vD, vA, vB | X-form | VSX | Copies sign from B to A (128-bit). |
| xscvdphp | xscvdphp XT, XB | XX2-form | VSX | Converts a double-precision floating-point value to a half-precision floating-point value with rounding. |
| xscvdpqp | xscvdpqp vD, vB | X-form | VSX | Converts a double-precision floating-point value to a quad-precision floating-point value. |
| xscvdpsp | xscvdpsp XT, XB | XX2-form | VSX | Converts a double-precision floating-point value in VSR[XB] to single-precision format and places the result into VSR[XT]. |
| xscvdpspn | xscvdpspn XT,XB | XX2-form | VSX | Converts a scalar single-precision floating-point value to vector single-precision format without raising exceptions for inexact results. |
| xscvdpsxds | xscvdpsxds XT, XB | XX2-form | VSX | Converts a double-precision floating-point value to a signed doubleword integer using round towards zero. |
| xscvdpsxw | xscvdpsxw XT,XB | X-form | VSX | Converts a double-precision floating-point number to a signed word, rounding towards zero. |
| xscvdpsxws | xscvdpsxws XT,XB | X-form | VSX | Converts a double-precision floating-point value to a signed word format using round towards zero. |
| xscvdpuxds | xscvdpuxds XT, XB | XX2-form | VSX | Converts a double-precision floating-point value to an unsigned 64-bit integer using round towards zero. |
| xscvdpuxws | xscvdpuxws XT,XB | XX2-form | VSX | Converts a double-precision floating-point value to an unsigned 32-bit integer, rounding towards zero. |
| xscvhpdp | xscvhpdp XT, XB | XX2-form | VSX | Converts a half-precision floating-point value to a double-precision floating-point value. |
| xscvqpdp | xscvqpdp vD, vB | X-form | VSX | Converts a quad-precision floating-point value to a double-precision floating-point value with round-to-even rounding. |
| xscvqpsdz | xscvqpsdz VRT,VRB | X-form | VSX | Converts a quad-precision floating-point value to a signed doubleword integer, rounding towards zero. |
| xscvqpsqz | xscvqpsqz VRT,VRB | X-form | VSX | Converts a quad-precision floating-point value to a signed quadword integer, rounding towards zero. |
| xscvqpswz | xscvqpswz VRT,VRB | X-form | VSX | Converts a quad-precision floating-point value to a signed word format. |
| xscvqpudz | xscvqpudz VRT,VRB | X-form | VSX | Converts a quad-precision floating-point value to an unsigned doubleword integer, rounding towards zero. |
| xscvqpuqz | xscvqpuqz VRT,VRB | X-form | VSX | Converts a quad-precision floating-point value to an unsigned quadword integer, rounding towards zero. |
| xscvqpuwz | xscvqpuwz VRT,VRB | X-form | VSX | Converts a quad-precision floating-point value to an unsigned word format. |
| xscvsdqp | xscvsdqp vD, vB | X-form | VSX | Converts a signed doubleword integer from VSR[VRB+32] to quad-precision floating-point in VSR[VRT+32]. |
| xscvspdp | xscvspdp XT, XB | XX2-form | VSX | Converts a single-precision floating-point value in VSR[XB] to double-precision format and places the result into VSR[XT]. |
| xscvsqqp | xscvsqqp VRT,VRB | X-form | VSX | Converts a signed quadword integer to a quad-precision floating-point number and rounds it. |
| xscvsxddp | xscvsxddp XT,RB | X-form | VSX | Converts a signed doubleword integer from VSX register XB to a double-precision floating-point number in VSX register XT, rounding according to the FPSCR.RN setting. |
| xscvsxdsp | xscvsxdsp XT,XB | XX2-form | VSX | Converts a signed doubleword integer in a VSX register to a single-precision floating-point number and rounds it. |
| xscvudqp | xscvudqp vD, vB | X-form | VSX | Converts 64-bit Unsigned Integer to 128-bit Float. |
| xsdivdp | xsdivdp XT,XA,XB | XX3-form | VSX | Divides the double-precision floating-point value in VSR[XA] by the double-precision floating-point value in VSR[XB]. |
| xsdivqp | xsdivqp vD, vA, vB | X-form | VSX | Divides the contents of two quad-precision floating-point registers and places the result in another register. |
| xsdivqpo | xsdivqpo vD, vA, vB | X-form | VSX | Used for Quad-Precision arithmetic on hardware that splits quads. |
| xsdivsp | xsdivsp XT, XA, XB | XX3-form | VSX | Divides the contents of two doubleword elements in VSX registers and places the result in a single-precision format. |
| xsiexpdp | xsiexpdp XT, XA, XB | XX3-form | VSX | Inserts exponent from one double into another. |
| xsiexpqp | xsiexpqp VRT,VRA,VRB | X-form | VSX | Inserts the exponent from a doubleword element of one vector register into another vector register. |
| xsmaddadp | xsmaddadp XT,XA,XB | XX3-form | VSX | Performs a double-precision floating-point multiply-add operation. |
| xsmaddasp | xsmaddasp XT,XA,XB | XX3-form | VSX | Performs a single-precision floating-point multiply-add operation. |
| xsmaddmsp | xsmaddmsp FRT,FRB,FRC | XX3-form | VSX | Multiplies two single-precision floating-point values and adds a third, storing the result in the target register (Type-M form). |
| xsmaddqp | xsmaddqp VRT,VRA,VRB | X-form | VSX | Performs a quad-precision floating-point multiply-add operation with rounding to even. |
| xsmaxcdp | xsmaxcdp XT, XA, XB | XX3-form | VSX | Computes the maximum of two double-precision floating-point values and stores the result in a vector scalar register. |
| xsmaxcqp | xsmaxcqp vD, vA, vB | X-form | VSX | Compares two quad-precision floating-point values and selects the maximum. |
| xsmaxdp | xsmaxdp XT, XA, XB | XX3-form | VSX | Compares the doubleword elements of two vector scalar registers and stores the maximum value in another vector scalar register. |
| xsmaxjdp | xsmaxjdp XT, XA, XB | XX3-form | VSX | Compares two double-precision floating-point values and returns the larger one, with specific handling for zero and NaN values. |
| xsmincdp | xsmincdp XT, XA, XB | XX3-form | VSX | Computes the minimum of two double-precision floating-point numbers and handles NaNs according to Type-C rules. |
| xsmincqp | xsmincqp vD, vA, vB | X-form | VSX | Compares two quad-precision floating-point values and selects the minimum value. |
| xsmindp | xsmindp XT, XA, XB | XX3-form | VSX | Computes the minimum of two double-precision floating-point values and places the result into a vector scalar register. |
| xsminjdp | xsminjdp XT, XA, XB | XX3-form | VSX | Compares two double-precision floating-point values and selects the minimum value, handling special cases like NaNs and zeros. |
| xsmsubadp | xsmsubadp XT,XA,XB | XX3-form | VSX | Performs a double-precision floating-point multiply-subtract operation. |
| xsmsubasp | xsmsubasp XT,XA,XB | X-form | VSX | Performs a multiply-subtract-add operation on single-precision floating-point values. |