ARM Opcode Map
Reverse lookup instructions by their hexadecimal encoding.
| Opcode | Mnemonic | Syntax | Format | Name |
|---|---|---|---|---|
| 0xBA40 | rev16 | REV16 <Rd>, <Rm> | Thumb Data Proc | Reverse Bytes Halfword (Thumb) |
| 0x5AC00400 | rev16 | REV16 <Wd>, <Wn> | Data Processing | Reverse Bytes in Halfwords |
| 0xFA90F090 | rev16 | REV16 <Rd>, <Rm> | Thumb Misc | Reverse Bytes in Halfwords (Thumb) |
| 0xDAC00800 | rev32 | REV32 <Xd>, <Xn> | Data Processing | Reverse Bytes in Words |
| 0x05248000 | revb | REVB <Zd>.<T>, <Pg>/M, <Zn>.<T> | SVE Permute | SVE Reverse Bytes in Elements |
| 0x05258000 | revh | REVH <Zd>.<T>, <Pg>/M, <Zn>.<T> | SVE Permute | SVE Reverse Halfwords in Elements |
| 0xBAC0 | revsh | REVSH <Rd>, <Rm> | Thumb Data Proc | Reverse Signed Halfword (Thumb) |
| 0xFA90F0B0 | revsh | REVSH <Rd>, <Rm> | Thumb Misc | Reverse Signed Halfword (Thumb) |
| 0x05268000 | revw | REVW <Zd>.D, <Pg>/M, <Zn>.D | SVE Permute | SVE Reverse Words in Elements |
| 0xF8100A00 | rfe | RFE<c> <Rn>{!} | System | Return From Exception |
| 0xBA000400 | rmif | RMIF <Xn>, #<shift>, #<mask> | Data Processing | Rotate Mask Insert Flags |
| 0xD53B2400 | rndr | RNDR <Xt> | System | Random Number |
| 0xD53B2600 | rndrrs | RNDRRS <Xt> | System | Random Number Reseed |
| 0x01A00070 | ror | ROR{S}<c> <Rd>, <Rm>, <Rs> | Data Proc | Rotate Right (A32) |
| 0x1AC02C00 | rorv | RORV <Wd>, <Wn>, <Wm> | Data Processing | Rotate Right (Register) |
| 0x01A00060 | rrx | RRX{S}<c> <Rd>, <Rm> | Data Proc | Rotate Right with Extend (A32) |
| 0xEA4F0030 | rrx | RRX{S}.W <Rd>, <Rm> | Thumb2 Data Proc | Rotate Right with Extend (Thumb) |
| 0x4240 | rsb | RSB <Rd>, <Rn>, #0 | Thumb Data Proc | Reverse Subtract (Thumb) |
| 0x02600000 | rsb | RSB{S}<c> <Rd>, <Rn>, <Operand2> | Data Proc | Reverse Subtract (A32) |
| 0xEBC00000 | rsb.w | RSB.W <Rd>, <Rn>, <Operand2> | Thumb2 Data Proc | Reverse Subtract (Wide) |
| 0x02E00000 | rsc | RSC{S}<c> <Rd>, <Rn>, <Operand2> | Data Proc | Reverse Subtract with Carry (A32) |
| 0x06100F10 | sadd16 | SADD16<c> <Rd>, <Rn>, <Rm> | SIMD Integer | Signed Add 16 (A32) |
| 0x06100F90 | sadd8 | SADD8<c> <Rd>, <Rn>, <Rm> | SIMD Integer | Signed Add 8 (A32) |
| 0x0E200000 | saddl | SADDL <Vd>.<Td>, <Vn>.<Ts>, <Vm>.<Ts> | SIMD Three Register Diff | Signed Add Long |
| 0x04002000 | saddv | SADDV <Vd>, <Pg>, <Zn>.<T> | SVE Reduction | SVE Signed Integer Add Reduction |
| 0x0E201000 | saddw | SADDW <Vd>.<Td>, <Vn>.<Td>, <Vm>.<Ts> | SIMD Three Register Diff | Signed Add Wide |
| 0xF57FF070 | sb | SB | System Hint | Speculation Barrier (A32) |
| 0xD50330FF | sb | SB | System Hint | Speculation Barrier |
| 0x5A000000 | sbc | SBC <Wd>, <Wn>, <Wm> | Data Processing | Subtract with Carry |
| 0x02C00000 | sbc | SBC{S}<c> <Rd>, <Rn>, <Operand2> | Data Proc | Subtract with Carry (A32) |
| 0xEB600000 | sbc.w | SBC.W <Rd>, <Rn>, <Operand2> | Thumb2 Data Proc | Subtract with Carry (Wide) |
| 0x7A000000 | sbcs | SBCS <Wd>, <Wn>, <Wm> | Data Processing | Subtract with Carry and Set Flags |
| 0x13000000 | sbfm | SBFM <Wd>, <Wn>, #<immr>, #<imms> | Bitfield | Signed Bitfield Move |
| 0x07A00050 | sbfx | SBFX<c> <Rd>, <Rn>, #<lsb>, #<width> | Data Proc | Signed Bit Field Extract (A32) |
| 0xF3400000 | sbfx | SBFX <Rd>, <Rn>, #<lsb>, #<width> | Thumb Bitfield | Signed Bit Field Extract (Thumb) |
| 0x6552A000 | scvtf | SCVTF <Zdn>.<T>, <Pg>/M, <Zdn>.<T> | SVE Conversion | SVE Signed Integer Convert to Floating-Point |
| 0x1E220000 | scvtf | SCVTF <Hd|Sd|Dd>, <Wn|Xn> {, #<fbits>} | FP Conversion | Signed Integer Convert to Floating-Point |
| 0x9E220000 | scvtf | SCVTF <Dd>, <Xn> | Float Conversion | Signed Integer Convert to Floating-point |
| 0x04140000 | sdiv | SDIV <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T> | SVE Integer Binary | SVE Signed Divide |
| 0x1AC00C00 | sdiv | SDIV <Wd>, <Wn>, <Wm> | Data Processing | Signed Divide |
| 0xFB90F0F0 | sdiv | SDIV <Rd>, <Rn>, <Rm> | Thumb Div | Signed Divide (Thumb) |
| 0x0710F010 | sdiv | SDIV<c> <Rd>, <Rn>, <Rm> | Data Proc | Signed Divide (A32) |
| 0x44000000 | sdot | SDOT <Zda>.<T>, <Zn>.<Tb>, <Zm>.<Tb> | SVE Dot Product | SVE Signed Dot Product |
| 0x4400C800 | sdot | SDOT<c>.S8 <Qd>, <Qn>, <Qm> | NEON 3-Reg | Signed Dot Product (A32) |
| 0x0E009400 | sdot | SDOT <Vd>.4S, <Vn>.16B, <Vm>.16B | NEON DotProd | Signed Dot Product (NEON) |
| 0x44000000 | sdot | SDOT { <Zd1>.S-<Zd2>.S }, <Zn>.B, <Zm>.B | SME2 DotProd | Signed Dot Product (Multi-vector) |
| 0x0520C000 | sel | SEL <Zd>.<T>, <Pg>, <Zn>.<T>, <Zm>.<T> | SVE Select | SVE Select Elements |
| 0x06800FB0 | sel | SEL<c> <Rd>, <Rn>, <Rm> | Data Proc | Select Bytes |
| 0xF1010000 | setend | SETEND <endian> | System | Set Endianness |
| 0xB650 | setend | SETEND <endian> | Thumb System | Set Endianness (Thumb) |
| 0x3A00480D | setf16 | SETF16 <Wn> | System | Set Flags 16-bit |
| 0x3A00080D | setf8 | SETF8 <Wn> | System | Set Flags 8-bit |
| 0xF1100000 | setpan | SETPAN #<imm> | System | Set Privileged Access Never (A32) |
| 0xD503209F | sev | SEV | System Alias | Send Event |
| 0x0320F004 | sev | SEV | System Hint | Send Event (A32) |
| 0xBF40 | sev | SEV | Thumb System | Send Event (Thumb) |
| 0xD50320BF | sevl | SEVL | System Alias | Send Event Local |
| 0x0320F005 | sevl | SEVL | System Hint | Send Event Local (A32) |
| 0xBF50 | sevl | SEVL | Thumb System | Send Event Local (Thumb) |
| 0xF2000C00 | sha1c | SHA1C.32 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SHA1 Choose (A32) |
| 0x5E000000 | sha1c | SHA1C <Qd>, <Sn>, <Vm>.4S | Crypto | SHA1 Choose (A64) |
| 0x5E000000 | sha1c | SHA1C <Qd>, <Sn>, <Vm>.<T> | Crypto | SHA1 Choose |
| 0xF3B102C0 | sha1h | SHA1H.32 <Qd>, <Qm> | Crypto 2-Reg | SHA1 Hash Update (A32) |
| 0x5E280800 | sha1h | SHA1H <Sd>, <Sn> | Crypto | SHA1 Hash Update (A64) |
| 0xF2200C00 | sha1m | SHA1M.32 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SHA1 Majority (A32) |
| 0x5E002000 | sha1m | SHA1M <Qd>, <Sn>, <Vm>.<T> | Crypto | SHA1 Majority |
| 0xF2100C00 | sha1p | SHA1P.32 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SHA1 Parity (A32) |
| 0x5E001000 | sha1p | SHA1P <Qd>, <Sn>, <Vm>.<T> | Crypto | SHA1 Parity |
| 0xF3000C00 | sha256h | SHA256H.32 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SHA256 Hash Part 1 (A32) |
| 0x5E004000 | sha256h | SHA256H <Qd>, <Qn>, <Vm>.4S | Crypto | SHA256 Hash Part 1 (A64) |
| 0x5E004000 | sha256h | SHA256H <Qd>, <Qn>, <Vm>.<T> | Crypto | SHA256 Hash Part 1 |
| 0xF3100C00 | sha256h2 | SHA256H2.32 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SHA256 Hash Part 2 (A32) |
| 0x5E005000 | sha256h2 | SHA256H2 <Qd>, <Qn>, <Vm>.4S | Crypto | SHA256 Hash Part 2 (A64) |
| 0x5E005000 | sha256h2 | SHA256H2 <Qd>, <Qn>, <Vm>.<T> | Crypto | SHA256 Hash Part 2 |
| 0xF3B203C0 | sha256su0 | SHA256SU0.32 <Qd>, <Qm> | Crypto 2-Reg | SHA256 Schedule Update 0 (A32) |
| 0xF3200C00 | sha256su1 | SHA256SU1.32 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SHA256 Schedule Update 1 (A32) |
| 0xCE608000 | sha512h | SHA512H.64 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SHA512 Hash Part 1 (A32) |
| 0xCE608400 | sha512h2 | SHA512H2.64 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SHA512 Hash Part 2 (A32) |
| 0xCEC08000 | sha512su0 | SHA512SU0.64 <Qd>, <Qm> | Crypto 2-Reg | SHA512 Schedule Update 0 (A32) |
| 0xCE608800 | sha512su1 | SHA512SU1.64 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SHA512 Schedule Update 1 (A32) |
| 0x06300F10 | shadd16 | SHADD16<c> <Rd>, <Rn>, <Rm> | SIMD Integer | Signed Halving Add 16 |
| 0x06300F90 | shadd8 | SHADD8<c> <Rd>, <Rn>, <Rm> | SIMD Integer | Signed Halving Add 8 |
| 0x0F005400 | shl | SHL <Vd>.<T>, <Vn>.<T>, #<shift> | SIMD Shift Imm | Vector Shift Left (Immediate) |
| 0x2E213800 | shll | SHLL <Vd>.<Td>, <Vn>.<Ts>, #<shift> | SIMD Shift Imm | Shift Left Long |
| 0x0F008400 | shrn | SHRN <Vd>.<Tb>, <Vn>.<Ta>, #<shift> | SIMD Shift Imm | Shift Right Narrow |
| 0x06300F70 | shsub16 | SHSUB16<c> <Rd>, <Rn>, <Rm> | SIMD Integer | Signed Halving Subtract 16 |
| 0x06300FF0 | shsub8 | SHSUB8<c> <Rd>, <Rn>, <Rm> | SIMD Integer | Signed Halving Subtract 8 |
| 0x2F005400 | sli | SLI <Vd>.<T>, <Vn>.<T>, #<shift> | SIMD Shift Imm | Shift Left and Insert |
| 0xCE60C000 | sm3partw1 | SM3PARTW1.32 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SM3 Part Word 1 (A32) |
| 0xCE60C400 | sm3partw2 | SM3PARTW2.32 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SM3 Part Word 2 (A32) |
| 0xCE400000 | sm3ss1 | SM3SS1.32 <Qd>, <Qn>, <Qm> | Crypto 3-Reg | SM3 Step 1 (A32) |
| 0xCE408000 | sm3tt1a | SM3TT1A.32 <Qd>, <Dn>, <Dm>, #<imm> | Crypto Imm | SM3 Step 2A (A32) |
| 0xCE408400 | sm3tt1b | SM3TT1B.32 <Qd>, <Dn>, <Dm>, #<imm> | Crypto Imm | SM3 Step 2B (A32) |
| 0xCE408800 | sm3tt2a | SM3TT2A.32 <Qd>, <Dn>, <Dm>, #<imm> | Crypto Imm | SM3 Step 3A (A32) |
| 0xCE408C00 | sm3tt2b | SM3TT2B.32 <Qd>, <Dn>, <Dm>, #<imm> | Crypto Imm | SM3 Step 3B (A32) |
| 0xCEC08400 | sm4e | SM4E.32 <Qd>, <Qm> | Crypto 2-Reg | SM4 Encrypt (A32) |
| 0x4520F000 | sm4ekey | SM4EKEY.32 <Qd>, <Qm> | Crypto 2-Reg | SM4 Key (A32) |
| 0x9B200000 | smaddl | SMADDL <Xd>, <Wn>, <Wm>, <Xa> | Data Processing | Signed Multiply-Add Long |
| 0x04080000 | smax | SMAX <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T> | SVE Integer Binary | SVE Signed Maximum |
| 0x0E206400 | smax | SMAX <Vd>.<T>, <Vn>.<T>, <Vm>.<T> | SIMD Three Register | Vector Signed Maximum |