ARM Opcode Map
Reverse lookup instructions by their hexadecimal encoding.
| Opcode | Mnemonic | Syntax | Format | Name |
|---|---|---|---|---|
| 0xFEB90A40 | vrintn | VRINTN<c>.F32 <Qd>, <Qm> | NEON 2-Reg | Vector Round Floating-Point (Nearest Even) |
| 0xFEBA0A40 | vrintp | VRINTP<c>.F32 <Sd>, <Sm> | VFP Unary | Vector Round Floating-Point (Plus Infinity) |
| 0xFEBA0B40 | vrintp | VRINTP<c>.F64 <Dd>, <Dm> | VFP Unary | Vector Round Floating-Point Double (Plus Infinity) |
| 0x0EB60A40 | vrintr | VRINTR<c>.F32 <Sd>, <Sm> | VFP Unary | Vector Round Floating-Point (Current) |
| 0x0EB70A40 | vrintx | VRINTX<c>.F32 <Sd>, <Sm> | VFP Unary | Vector Round Floating-Point (Exact) |
| 0x0EB60AC0 | vrintz | VRINTZ<c>.F32 <Qd>, <Qm> | NEON 2-Reg | Vector Round Floating-Point (Zero) |
| 0xF2000500 | vrshl | VRSHL<c>.<dt> <Qd>, <Qm>, <Qn> | NEON 3-Reg | Vector Rounding Shift Left |
| 0xF2800210 | vrshr | VRSHR<c>.<dt> <Qd>, <Qm>, #<imm> | NEON Shift | Vector Rounding Shift Right |
| 0xF3B20200 | vrshrn | VRSHRN<c>.<dt> <Dd>, <Qm>, #<imm> | NEON Shift | Vector Rounding Shift Right Narrow |
| 0xF3B304C0 | vrsqrte | VRSQRTE<c>.<dt> <Qd>, <Qm> | NEON 2-Reg | Vector Reciprocal Square Root Estimate |
| 0xF2200F10 | vrsqrts | VRSQRTS<c>.F32 <Qd>, <Qn>, <Qm> | NEON 3-Reg | Vector Reciprocal Square Root Step |
| 0xF2800310 | vrsra | VRSRA<c>.<dt> <Qd>, <Qm>, #<imm> | NEON Shift | Vector Rounding Shift Right and Accumulate |
| 0xF3800600 | vrsubhn | VRSUBHN<c>.<dt> <Dd>, <Qn>, <Qm> | NEON 3-Reg | Vector Rounding Subtract High Narrow |
| 0xFE000A00 | vsel | VSEL<cond>.F32 <Sd>, <Sn>, <Sm> | VFP Misc | Vector Select |
| 0xFE000B00 | vsel | VSEL<cond>.F64 <Dd>, <Dn>, <Dm> | VFP Misc | Vector Select (Double) |
| 0xF2800510 | vshl | VSHL<c>.<dt> <Qd>, <Qm>, #<imm> | NEON Shift | Vector Shift Left (Immediate) |
| 0xF2800010 | vshr | VSHR<c>.<dt> <Qd>, <Qm>, #<imm> | NEON Shift | Vector Shift Right (Immediate) |
| 0xF2800810 | vshrn | VSHRN<c>.<dt> <Dd>, <Qm>, #<imm> | NEON Shift | Vector Shift Right Narrow |
| 0xF3800550 | vsli | VSLI<c>.<size> <Qd>, <Qm>, #<imm> | NEON Shift | Vector Shift Left and Insert |
| 0xFC200C40 | vsmmla | VSMMLA<c>.S8 <Qd>, <Qn>, <Qm> | NEON MatMul | Vector Signed Int8 Matrix Multiply (A32) |
| 0x0EB10BC0 | vsqrt | VSQRT<c>.F64 <Dd>, <Dm> | VFP Unary | Vector Square Root (Double) |
| 0x0EB10AC0 | vsqrt | VSQRT<c>.F32 <Sd>, <Sm> | VFP Unary | Vector Square Root (VFP) |
| 0xF2800110 | vsra | VSRA<c>.<dt> <Qd>, <Qm>, #<imm> | NEON Shift | Vector Shift Right and Accumulate |
| 0xF3800450 | vsri | VSRI<c>.<size> <Qd>, <Qm>, #<imm> | NEON Shift | Vector Shift Right and Insert |
| 0xF480000D | vst1 | VST1<c>.<size> <list>, [<Rn>]{!} | NEON Store | Vector Store Multiple (Single Element) |
| 0xF480020D | vst3 | VST3<c>.<size> <list>, [<Rn>]{!} | NEON Store | Vector Store Multiple (3-Element Structure) |
| 0xF4000000 | vst4 | VST4<c>.<size> <list>, [<Rn>]{!} | NEON Store | Vector Store Multiple (4-Element Structure) |
| 0x0C800A00 | vstm | VSTM<c><mode> <Rn>{!}, <list> | VFP Store Multiple | Vector Store Multiple (VFP) |
| 0x0D000A00 | vstr | VSTR<c> <Sd>, [<Rn>, #+/-<imm>] | VFP Store | Vector Store Register (VFP) |
| 0x0E300A40 | vsub | VSUB<c>.F32 <Sd>, <Sn>, <Sm> | VFP Arith | Vector Subtract (VFP) |
| 0xF2200D40 | vsub | VSUB<c>.<dt> <Qd>, <Qn>, <Qm> | NEON 3-Reg | Vector Subtract (Integer) |
| 0xF2800600 | vsubhn | VSUBHN<c>.<dt> <Dd>, <Qn>, <Qm> | NEON 3-Reg | Vector Subtract High Narrow |
| 0xF3B20000 | vswp | VSWP<c> <Qd>, <Qm> | NEON 2-Reg | Vector Swap |
| 0xF3B00800 | vtbl | VTBL<c>.8 <Dd>, <list>, <Dm> | NEON Table | Vector Table Lookup |
| 0xF3B00840 | vtbx | VTBX<c>.8 <Dd>, <list>, <Dm> | NEON Table | Vector Table Extension |
| 0xF3B200C0 | vtrn | VTRN<c>.<dt> <Qd>, <Qm> | NEON 2-Reg | Vector Transpose |
| 0xF2000810 | vtst | VTST<c>.<dt> <Qd>, <Qn>, <Qm> | NEON 3-Reg | Vector Test Bits |
| 0xFC200C50 | vummla | VUMMLA<c>.U8 <Qd>, <Qn>, <Qm> | NEON MatMul | Vector Unsigned Matrix Multiply (A32) |
| 0xFCA00D40 | vusdot | VUSDOT<c>.S8 <Qd>, <Qn>, <Qm> | NEON DotProd | Vector Unsigned-Signed Dot Product (A32) |
| 0xFCA00C40 | vusmmla | VUSMMLA<c>.S8 <Qd>, <Qn>, <Qm> | NEON MatMul | Vector Unsigned-Signed Matrix Multiply (A32) |
| 0xF3B20140 | vuzp | VUZP<c>.<dt> <Qd>, <Qm> | NEON 2-Reg | Vector Unzip |
| 0xF3B201C0 | vzip | VZIP<c>.<dt> <Qd>, <Qm> | NEON 2-Reg | Vector Zip |
| 0xD503205F | wfe | WFE | System Alias | Wait For Event |
| 0x0320F002 | wfe | WFE | System Hint | Wait For Event (A32) |
| 0xBF20 | wfe | WFE | Thumb System | Wait For Event (Thumb) |
| 0xD5031000 | wfet | WFET <Wn> | System | Wait For Event with Timeout |
| 0xD503207F | wfi | WFI | System Alias | Wait For Interrupt |
| 0x0320F003 | wfi | WFI | System Hint | Wait For Interrupt (A32) |
| 0xBF30 | wfi | WFI | Thumb System | Wait For Interrupt (Thumb) |
| 0xD5031020 | wfit | WFIT <Wn> | System | Wait For Interrupt with Timeout |
| 0x25200000 | whilege | WHILEGE <Pd>.<T>, <R><n>, <R><m> | SVE2 | While Greater or Equal (Extended) |
| 0x25200010 | whilegt | WHILEGT <Pd>.<T>, <R><n>, <R><m> | SVE2 | While Greater Than (Extended) |
| 0x25200810 | whilehi | WHILEHI <Pd>.<T>, <Xn>, <Xm> | SVE Compare | SVE While Higher (Unsigned) |
| 0x25200800 | whilehs | WHILEHS <Pd>.<T>, <Xn>, <Xm> | SVE Compare | SVE While Higher or Same (Unsigned) |
| 0x25200410 | whilele | WHILELE <Pd>.<T>, <Xn>, <Xm> | SVE Compare Scalar | SVE While Less Than or Equal |
| 0x25200C00 | whilelo | WHILELO <Pd>.<T>, <Xn>, <Xm> | SVE Compare | SVE While Lower (Unsigned) |
| 0x25200C10 | whilels | WHILELS <Pd>.<T>, <Xn>, <Xm> | SVE Compare | SVE While Lower or Same (Unsigned) |
| 0x25200400 | whilelt | WHILELT <Pd>.<T>, <Xn>, <Xm> | SVE Compare Scalar | SVE While Less Than |
| 0x25203010 | whilerw | WHILERW <Pd>.<T>, <Xn>, <Xm> | SVE2 Predicate | While Read/Write (SVE2) |
| 0x25203000 | whilewr | WHILEWR <Pd>.<T>, <Xn>, <Xm> | SVE2 Predicate | While Write/Read (SVE2) |
| 0x25289000 | wrffr | WRFFR <Pn>.B | SVE | Write First-Fault Register |
| 0x04203400 | xar | XAR <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T>, #<const> | SVE2 Bitwise | SVE Exclusive OR and Rotate |
| 0xDAC147E0 | xpacd | XPACD <Xd> | Data Processing | Strip Pointer Authentication Code (Data) |
| 0xDAC143E0 | xpaci | XPACI <Xd> | Data Processing | Strip Pointer Authentication Code (Inst) |
| 0xD50320FF | xpaclri | XPACLRI | System | Strip PAC from Instruction Address |
| 0x0E212800 | xtn | XTN <Vd>.<Tb>, <Vn>.<Ta> | SIMD Shift Imm | Vector Extract Narrow |
| 0xD503203F | yield | YIELD | System Alias | Yield |
| 0x0320F001 | yield | YIELD | System Hint | Yield (A32) |
| 0xBF10 | yield | YIELD | Thumb System | Yield (Thumb) |
| 0xC0080000 | zero | ZERO { {<mask>} } | SME | Zero Matrix Tile |
| 0x0E003800 | zip1 | ZIP1 <Vd>.<T>, <Vn>.<T>, <Vm>.<T> | SIMD Permute | Vector Zip 1 (Interleave) |
| 0x05206000 | zip1 | ZIP1 <Zd>.<T>, <Zn>.<T>, <Zm>.<T> | SVE Permute | SVE Zip 1 |
| 0x0E007800 | zip2 | ZIP2 <Vd>.<T>, <Vn>.<T>, <Vm>.<T> | SIMD Permute | Vector Zip 2 (Interleave) |
| 0x05206400 | zip2 | ZIP2 <Zd>.<T>, <Zn>.<T>, <Zm>.<T> | SVE Permute | SVE Zip 2 |