xar

SVE Exclusive OR and Rotate

XAR <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T>, #<const>

Performs XOR followed by a right rotation (used in SHA-3/SM3).

Pseudocode Operation

No pseudocode available.

Encoding

Binary Layout

00000100

31:24

tszh

23:22

tszl

20:19

imm3

18:16

001101

15:10

9:5

Zdn

4:0

Format SVE2 Bitwise

Opcode 0x04203400

Extension SVE2

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xCE800000	XAR <Vd>.2D, <Vn>.2D, <Vm>.2D, #<imm6>		A64		11001110100 \| Rm \| imm6 \| Rn \| Rd
0x04203400	XAR <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T>, #<const>		A64		00000100 \| tszh \| 1 \| tszl \| imm3 \| 001101 \| Zm \| Zdn

Description

Bitwise exclusive OR the corresponding elements of the first and second source vectors, then rotate each result element right by an immediate amount. The final results are destructively placed in the corresponding elements of the destination and first source vector. This instruction is unpredicated.

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer elements = VL DIV esize;
bits(VL) operand1 = Z[dn, VL];
bits(VL) operand2 = Z[m, VL];
bits(VL) result;

for e = 0 to elements-1
    bits(esize) element1 = Elem[operand1, e, esize];
    bits(esize) element2 = Elem[operand2, e, esize];
    Elem[result, e, esize] = ROR(element1 EOR element2, rot);
Z[dn, VL] = result;

xar