AMDGPU / GFX Instructions GPU Native ISA AMD
1960 instructions - showing 100 per page, page 11 of 20 - AMDGPU/GFX is AMD's native, low-level
GPU instruction set family, assembled directly with no virtual intermediate layer. Supported
instructions and their exact encodings vary by GFX compatibility target (e.g.
gfx942, gfx1100). Scalar instructions execute once per wavefront on
the Scalar ALU; vector instructions execute per-lane on the Vector ALU, gated by the EXEC mask.
| Mnemonic | Syntax | Format | GFX Targets | Unit | Summary |
|---|---|---|---|---|---|
| v_ceil_f16 | v_ceil_f16 | VOP1 | Round the half-precision float input up to next integer and store the result in floating point format into a vector register. | ||
| v_ceil_f32 | v_ceil_f32 | VOP1 | gfx1100 | Round the single-precision float input up to next integer and store the result in floating point format into a vector register. | |
| v_ceil_f64 | v_ceil_f64 | VOP1 | gfx1100 | Round the double-precision float input up to next integer and store the result in floating point format into a vector register. | |
| v_clrexcp | v_clrexcp | VOP1 | Clear this wave's exception state in the vector ALU. | ||
| v_cmp_class_f16 | v_cmp_class_f16 | VOPC | gfx1100 | Evaluate the IEEE numeric class function specified as a 10 bit mask in the second input on the first input, a half-precision float, and set the… | |
| v_cmp_class_f32 | v_cmp_class_f32 | VOPC | gfx1100 | Evaluate the IEEE numeric class function specified as a 10 bit mask in the second input on the first input, a single-precision float, and set the… | |
| v_cmp_class_f64 | v_cmp_class_f64 | VOPC | gfx1100 | Evaluate the IEEE numeric class function specified as a 10 bit mask in the second input on the first input, a double-precision float, and set the… | |
| v_cmp_eq_f16 | v_cmp_eq_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_eq_f32 | v_cmp_eq_f32 VCC, S0, S1 | VOPC | gfx942, gfx1100 | Vector ALU | Per-lane single-precision equality compare, result written as an execution-mask-width bitmask. |
| v_cmp_eq_f64 | v_cmp_eq_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_eq_i16 | v_cmp_eq_i16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_eq_i32 | v_cmp_eq_i32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_eq_i64 | v_cmp_eq_i64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_eq_u16 | v_cmp_eq_u16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_eq_u32 | v_cmp_eq_u32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_eq_u64 | v_cmp_eq_u64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_f_f16 | v_cmp_f_f16 | VOPC | gfx1100 | Set the per-lane condition code to 0. Store the result into VCC or a scalar register. | |
| v_cmp_f_f32 | v_cmp_f_f32 | VOPC | gfx1100 | Set the per-lane condition code to 0. Store the result into VCC or a scalar register. | |
| v_cmp_f_f64 | v_cmp_f_f64 | VOPC | gfx1100 | Set the per-lane condition code to 0. Store the result into VCC or a scalar register. | |
| v_cmp_f_i16 | v_cmp_f_i16 | VOPC | Set the per-lane condition code to 0. Store the result into VCC or a scalar register. | ||
| v_cmp_f_i32 | v_cmp_f_i32 | VOPC | gfx1100 | Set the per-lane condition code to 0. Store the result into VCC or a scalar register. | |
| v_cmp_f_i64 | v_cmp_f_i64 | VOPC | gfx1100 | Set the per-lane condition code to 0. Store the result into VCC or a scalar register. | |
| v_cmp_f_u16 | v_cmp_f_u16 | VOPC | Set the per-lane condition code to 0. Store the result into VCC or a scalar register. | ||
| v_cmp_f_u32 | v_cmp_f_u32 | VOPC | gfx1100 | Set the per-lane condition code to 0. Store the result into VCC or a scalar register. | |
| v_cmp_f_u64 | v_cmp_f_u64 | VOPC | gfx1100 | Set the per-lane condition code to 0. Store the result into VCC or a scalar register. | |
| v_cmp_ge_f16 | v_cmp_ge_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ge_f32 | v_cmp_ge_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ge_f64 | v_cmp_ge_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ge_i16 | v_cmp_ge_i16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ge_i32 | v_cmp_ge_i32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ge_i64 | v_cmp_ge_i64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ge_u16 | v_cmp_ge_u16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ge_u32 | v_cmp_ge_u32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ge_u64 | v_cmp_ge_u64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_gt_f16 | v_cmp_gt_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_gt_f32 | v_cmp_gt_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_gt_f64 | v_cmp_gt_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_gt_i16 | v_cmp_gt_i16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_gt_i32 | v_cmp_gt_i32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_gt_i64 | v_cmp_gt_i64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_gt_u16 | v_cmp_gt_u16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_gt_u32 | v_cmp_gt_u32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_gt_u64 | v_cmp_gt_u64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_le_f16 | v_cmp_le_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_le_f32 | v_cmp_le_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_le_f64 | v_cmp_le_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_le_i16 | v_cmp_le_i16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_le_i32 | v_cmp_le_i32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_le_i64 | v_cmp_le_i64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_le_u16 | v_cmp_le_u16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_le_u32 | v_cmp_le_u32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_le_u64 | v_cmp_le_u64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_lg_f16 | v_cmp_lg_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or greater than the second input. | |
| v_cmp_lg_f32 | v_cmp_lg_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or greater than the second input. | |
| v_cmp_lg_f64 | v_cmp_lg_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than or greater than the second input. | |
| v_cmp_lt_f16 | v_cmp_lt_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_lt_f32 | v_cmp_lt_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_lt_f64 | v_cmp_lt_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_lt_i16 | v_cmp_lt_i16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_lt_i32 | v_cmp_lt_i32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_lt_i64 | v_cmp_lt_i64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_lt_u16 | v_cmp_lt_u16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_lt_u32 | v_cmp_lt_u32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_lt_u64 | v_cmp_lt_u64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ne_i16 | v_cmp_ne_i16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ne_i32 | v_cmp_ne_i32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ne_i64 | v_cmp_ne_i64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ne_u16 | v_cmp_ne_u16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ne_u32 | v_cmp_ne_u32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ne_u64 | v_cmp_ne_u64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_neq_f16 | v_cmp_neq_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_neq_f32 | v_cmp_neq_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_neq_f64 | v_cmp_neq_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not equal to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_nge_f16 | v_cmp_nge_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not greater than or equal to the second input. | |
| v_cmp_nge_f32 | v_cmp_nge_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not greater than or equal to the second input. | |
| v_cmp_nge_f64 | v_cmp_nge_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not greater than or equal to the second input. | |
| v_cmp_ngt_f16 | v_cmp_ngt_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ngt_f32 | v_cmp_ngt_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_ngt_f64 | v_cmp_ngt_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not greater than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_nle_f16 | v_cmp_nle_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not less than or equal to the second input. | |
| v_cmp_nle_f32 | v_cmp_nle_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not less than or equal to the second input. | |
| v_cmp_nle_f64 | v_cmp_nle_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not less than or equal to the second input. | |
| v_cmp_nlg_f16 | v_cmp_nlg_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not less than or greater than the second input. | |
| v_cmp_nlg_f32 | v_cmp_nlg_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not less than or greater than the second input. | |
| v_cmp_nlg_f64 | v_cmp_nlg_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not less than or greater than the second input. | |
| v_cmp_nlt_f16 | v_cmp_nlt_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_nlt_f32 | v_cmp_nlt_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_nlt_f64 | v_cmp_nlt_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is not less than the second input. Store the result into VCC or a scalar register. | |
| v_cmp_o_f16 | v_cmp_o_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is orderable to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_o_f32 | v_cmp_o_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is orderable to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_o_f64 | v_cmp_o_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1 iff the first input is orderable to the second input. Store the result into VCC or a scalar register. | |
| v_cmp_t_f16 | v_cmp_t_f16 | VOPC | gfx1100 | Set the per-lane condition code to 1. Store the result into VCC or a scalar register. | |
| v_cmp_t_f32 | v_cmp_t_f32 | VOPC | gfx1100 | Set the per-lane condition code to 1. Store the result into VCC or a scalar register. | |
| v_cmp_t_f64 | v_cmp_t_f64 | VOPC | gfx1100 | Set the per-lane condition code to 1. Store the result into VCC or a scalar register. | |
| v_cmp_t_i16 | v_cmp_t_i16 | VOPC | Set the per-lane condition code to 1. Store the result into VCC or a scalar register. | ||
| v_cmp_t_i32 | v_cmp_t_i32 | VOPC | gfx1100 | Set the per-lane condition code to 1. Store the result into VCC or a scalar register. | |
| v_cmp_t_i64 | v_cmp_t_i64 | VOPC | gfx1100 | Set the per-lane condition code to 1. Store the result into VCC or a scalar register. | |
| v_cmp_t_u16 | v_cmp_t_u16 | VOPC | Set the per-lane condition code to 1. Store the result into VCC or a scalar register. | ||
| v_cmp_t_u32 | v_cmp_t_u32 | VOPC | gfx1100 | Set the per-lane condition code to 1. Store the result into VCC or a scalar register. | |
| v_cmp_t_u64 | v_cmp_t_u64 | VOPC | gfx1100 | Set the per-lane condition code to 1. Store the result into VCC or a scalar register. |
Source
Normalized from AMD's official ROCm documentation, with the LLVM AMDGPU backend documentation as supplementary compiler-target information. ROCm documentation ↗