s_flbit_i32 GPU Native ISA AMD Scalar
S FLBIT I32 Scalar Arithmetic
s_flbit_i32
Count the number of leading bits that are the same as the sign bit of a scalar input and store the result into a scalar register.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (SOP1)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
| Target | Support |
|---|---|
| gfx1100 | ✅ Supported |
Related PTX Concepts
Related
More in Scalar Arithmetic
Reference
AMDGPU / GFX ISA
Description
Count the number of leading bits that are the same as the sign bit of a scalar input and store the result into a scalar register. Store -1 if all input bits are the same.
Semantics
tmp = -1;
// Set if all bits are the same
for i in 1 : 31 do
// Search from MSB
if S0.u32[31 - i] != S0.u32[31] then
tmp = i;
break
endif
endfor;
D0.i32 = tmp
Example
S_FLBIT_I32(0x00000000) => 0xffffffff
S_FLBIT_I32(0x0000cccc) => 16
S_FLBIT_I32(0xffff3333) => 16
S_FLBIT_I32(0x7fffffff) => 1Reproduced from AMD's official "AMD Instinct MI300" ISA Reference Guide for technical accuracy.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 121.