s_endpgm GPU Native ISA AMD Scalar

S ENDPGM Branch & Control

s_endpgm

End of program; terminate wavefront.

Encoding

Verified bit-level encoding data is not yet available for this instruction. The instruction-format classification below (SOPP) is well-documented and stable; exact per-target opcode/field bit positions have not yet been imported from a verified source.

Format SOPP

Execution Unit

Operands

Operand details have not yet been curated for this instruction.

GFX Target Compatibility

Target	Support
gfx1100	✅ Supported

Related PTX Concepts

Kernel/Thread Exit ↗

equivalent with restrictions

exit (PTX)

Reference

AMDGPU / GFX ISA

Description

End of program; terminate wavefront. The hardware implicitly executes S_WAITCNT 0 before executing this instruction. See S_ENDPGM_SAVED for the context-switch version of this instruction.

Example

s_endpgm 1

A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite (gfx11). Not from an AMD document, and not authored here.

Sources

User Guide for AMDGPU Backend ↗ - LLVM Project
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗ - Advanced Micro Devices, Inc.
Reference Guide, page 138.
LLVM MC assembler tests for AMDGPU (gfx11) ↗ - LLVM Project