Branch & Control Instructions
67 AMDGPU instructions in this category - click any row for encoding, pseudocode, and full documentation.
| Mnemonic | Syntax | Format | Summary |
|---|---|---|---|
| s_barrier_leave | s_barrier_leave | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| s_barrier_wait | s_barrier_wait | SOPP | Wait for a barrier to complete. The SIMM16 argument specifies which barrier to wait on. |
| s_branch | s_branch offset | SOPP | Unconditional relative branch. |
| s_cbranch_cdbgsys | s_cbranch_cdbgsys | SOPP | If the system debug flag is set then jump to a constant offset relative to the current PC. |
| s_cbranch_cdbgsys_and_user | s_cbranch_cdbgsys_and_user | SOPP | If the system and user debug flag are set then jump to a constant offset relative to the current PC. |
| s_cbranch_cdbgsys_or_user | s_cbranch_cdbgsys_or_user | SOPP | If the system or user debug flag is set then jump to a constant offset relative to the current PC. |
| s_cbranch_cdbguser | s_cbranch_cdbguser | SOPP | If the user debug flag is set then jump to a constant offset relative to the current PC. |
| s_cbranch_execnz | s_cbranch_execnz | SOPP | If EXECZ is 0 then jump to a constant offset relative to the current PC. |
| s_cbranch_execz | s_cbranch_execz | SOPP | If EXECZ is 1 then jump to a constant offset relative to the current PC. |
| s_cbranch_scc0 | s_cbranch_scc0 | SOPP | If SCC is 0 then jump to a constant offset relative to the current PC. |
| s_cbranch_scc1 | s_cbranch_scc1 offset | SOPP | Conditional relative branch, taken when the SCC (scalar condition code) flag is set. |
| s_cbranch_vccnz | s_cbranch_vccnz | SOPP | If VCCZ is 0 then jump to a constant offset relative to the current PC. |
| s_cbranch_vccz | s_cbranch_vccz | SOPP | If VCCZ is 1 then jump to a constant offset relative to the current PC. |
| s_clause | s_clause | SOPP | Mark the beginning of a clause. |
| s_code_end | s_code_end | SOPP | Generate an illegal instruction interrupt. This instruction is used to mark the end of a shader buffer for debug tools. |
| s_decperflevel | s_decperflevel | SOPP | Decrement performance counter specified in SIMM16[3:0] by 1. |
| s_delay_alu | s_delay_alu | SOPP | Insert delay between dependent SALU/VALU instructions. |
| s_denorm_mode | s_denorm_mode | SOPP | Set floating point denormal mode using an immediate constant. |
| s_endpgm | s_endpgm | SOPP | End of program; terminate wavefront. |
| s_endpgm_ordered_ps_done | s_endpgm_ordered_ps_done | SOPP | End of program; signal that a wave has exited its POPS critical section and terminate wavefront. |
| s_endpgm_saved | s_endpgm_saved | SOPP | End of program; signal that a wave has been saved by the context-switch trap handler and terminate wavefront. |
| s_icache_inv | s_icache_inv | SOPP | Invalidate entire first level instruction cache. |
| s_incperflevel | s_incperflevel | SOPP | Increment performance counter specified in SIMM16[3:0] by 1. |
| s_inst_prefetch | s_inst_prefetch | SOPP | Change instruction prefetch mode. This controls how many cachelines ahead of the current PC the shader attempts to prefetch. |
| s_monitor_sleep | s_monitor_sleep | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| s_nop | s_nop | SOPP | Do nothing. |
| s_round_mode | s_round_mode | SOPP | Set floating point round mode using an immediate constant. |
| s_sendmsg | s_sendmsg | SOPP | Send a message upstream to graphics control hardware. SIMM16[9:0] contains the message type. |
| s_sendmsghalt | s_sendmsghalt | SOPP | Send a message to upstream control hardware and then HALT the wavefront; see S_SENDMSG for details. |
| s_set_gpr_idx_mode | s_set_gpr_idx_mode | SOPP | Modify the mode used for vector GPR indexing. |
| s_set_gpr_idx_off | s_set_gpr_idx_off | SOPP | Clear GPR indexing mode. |
| s_set_inst_prefetch_distance | s_set_inst_prefetch_distance | SOPP | Change instruction prefetch mode. This controls how many cachelines ahead of the current PC the shader attempts to prefetch. |
| s_set_valu_coexec_mode | s_set_valu_coexec_mode | SOPP | Set the vector ALU co-execution mode to the value encoded in SIMM16[1:0] for the next VALU instruction. |
| s_set_vgpr_msb | s_set_vgpr_msb | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| s_sethalt | s_sethalt | SOPP | Set or clear the HALT status bit. |
| s_setkill | s_setkill | SOPP | Kill this wave if the least significant bit of the immediate constant is 1. Used primarily for debugging kill wave host command behavior. |
| s_setprio | s_setprio | SOPP | Change wave user priority. |
| s_setprio_inc_wg | s_setprio_inc_wg | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| s_sleep | s_sleep | SOPP | Cause a wave to sleep for up to ~8000 clocks. |
| s_soft_wait_bvhcnt | s_soft_wait_bvhcnt | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| s_soft_wait_dscnt | s_soft_wait_dscnt | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| s_soft_wait_kmcnt | s_soft_wait_kmcnt | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| s_soft_wait_loadcnt | s_soft_wait_loadcnt | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| s_soft_wait_samplecnt | s_soft_wait_samplecnt | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| s_soft_wait_storecnt | s_soft_wait_storecnt | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| s_soft_waitcnt | s_soft_waitcnt | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| s_trap | s_trap | SOPP | Enter the trap handler. |
| s_ttracedata | s_ttracedata | SOPP | Send M0 as user data to the thread trace stream. |
| s_ttracedata_imm | s_ttracedata_imm | SOPP | Send SIMM16[7:0] as user data to the thread trace stream. |
| s_wait_alu | s_wait_alu | SOPP | Wait for one or more ALU-centric counters to fall below specified values. |
| s_wait_asynccnt | s_wait_asynccnt | SOPP | Wait until ASYNCCNT is less than or equal to SIMM16[5:0]. |
| s_wait_bvhcnt | s_wait_bvhcnt | SOPP | Wait until BVHCNT is less than or equal to SIMM16[2:0]. |
| s_wait_dscnt | s_wait_dscnt | SOPP | Wait until DSCNT is less than or equal to SIMM16[5:0]. |
| s_wait_event | s_wait_event | SOPP | Wait for an event to occur or a condition to be satisfied before continuing. The SIMM16 argument specifies which event(s) to wait on. |
| s_wait_expcnt | s_wait_expcnt | SOPP | Wait until EXPCNT is less than or equal to SIMM16[2:0]. |
| s_wait_idle | s_wait_idle | SOPP | Wait for all activity in the wave to be complete (all dependency and memory counters at zero). |
| s_wait_kmcnt | s_wait_kmcnt | SOPP | Wait until KMCNT is less than or equal to SIMM16[4:0]. |
| s_wait_loadcnt | s_wait_loadcnt | SOPP | Wait until LOADCNT is less than or equal to SIMM16[5:0]. |
| s_wait_loadcnt_dscnt | s_wait_loadcnt_dscnt | SOPP | Wait until LOADCNT is less than or equal to SIMM16[13:8] and DSCNT is less than or equal to SIMM16[5:0]. |
| s_wait_samplecnt | s_wait_samplecnt | SOPP | Wait until SAMPLECNT is less than or equal to SIMM16[5:0]. |
| s_wait_storecnt | s_wait_storecnt | SOPP | Wait until STORECNT is less than or equal to SIMM16[5:0]. |
| s_wait_storecnt_dscnt | s_wait_storecnt_dscnt | SOPP | Wait until STORECNT is less than or equal to SIMM16[13:8] and DSCNT is less than or equal to SIMM16[5:0]. |
| s_wait_tensorcnt | s_wait_tensorcnt | SOPP | Wait until TENSORCNT is less than or equal to SIMM16[5:0]. |
| s_wait_xcnt | s_wait_xcnt | SOPP | Wait until XCNT is less than or equal to SIMM16[5:0]. |
| s_waitcnt | s_waitcnt | SOPP | Wait for the counts of outstanding local data share, vector memory and export instructions to be at or below the specified levels. |
| s_waitcnt_depctr | s_waitcnt_depctr | SOPP | Wait for one or more ALU-centric counters to fall below specified values. Used in expert scheduling mode. |
| s_wakeup | s_wakeup | SOPP | Allow a wave to 'ping' all the other waves in its threadgroup to force them to wake up early from an S_SLEEP instruction. |