s_branch GPU Native ISA AMD Scalar

S BRANCH Branch & Control

s_branch offset

Unconditional relative branch.

Encoding

Verified bit-level encoding data is not yet available for this instruction. The instruction-format classification below (SOPP) is well-documented and stable; exact per-target opcode/field bit positions have not yet been imported from a verified source.
Format SOPP
Width 32 bits
Execution Unit Scalar ALU

Operands

  • offset
    Signed word-granularity branch offset

GFX Target Compatibility

TargetSupport
gfx942✅ Supported
gfx1100✅ Supported

Reference

AMDGPU / GFX ISA

Semantics

PC = PC + 4 + signed_offset * 4.

Sources