AMDGPU / GFX Instructions GPU Native ISA AMD
2442 instructions - showing 100 per page, page 10 of 25 - AMDGPU/GFX is AMD's native, low-level
GPU instruction set family, assembled directly with no virtual intermediate layer. Supported
instructions and their exact encodings vary by GFX compatibility target (e.g.
gfx942, gfx1100). Scalar instructions execute once per wavefront on
the Scalar ALU; vector instructions execute per-lane on the Vector ALU, gated by the EXEC mask.
How AMDGPU compares to the other GPU ISA
Decode a AMDGPU instruction word
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| Mnemonic | Syntax | Format | GFX Targets | Unit | Summary |
|---|---|---|---|---|---|
| s_buffer_load_dwordx2 | s_buffer_load_dwordx2 | SMEM | Load 64 bits of data from a scalar buffer surface into a scalar register. | ||
| s_buffer_load_dwordx4 | s_buffer_load_dwordx4 | SMEM | Load 128 bits of data from a scalar buffer surface into a scalar register. | ||
| s_buffer_load_dwordx8 | s_buffer_load_dwordx8 | SMEM | Load 256 bits of data from a scalar buffer surface into a scalar register. | ||
| s_buffer_load_i16 | s_buffer_load_i16 | SMEM | Load 16 bits of signed data from a scalar buffer surface, sign extend to 32 bits and store the result into a scalar register. | ||
| s_buffer_load_i8 | s_buffer_load_i8 | SMEM | Load 8 bits of signed data from a scalar buffer surface, sign extend to 32 bits and store the result into a scalar register. | ||
| s_buffer_load_u16 | s_buffer_load_u16 | SMEM | Load 16 bits of unsigned data from a scalar buffer surface, zero extend to 32 bits and store the result into a scalar register. | ||
| s_buffer_load_u8 | s_buffer_load_u8 | SMEM | Load 8 bits of unsigned data from a scalar buffer surface, zero extend to 32 bits and store the result into a scalar register. | ||
| s_buffer_prefetch_data | s_buffer_prefetch_data | SMEM | Prefetch data into the scalar data cache, relative to a base address provided in a resource descriptor constant. | ||
| s_buffer_store_dword | s_buffer_store_dword | SMEM | Store 32 bits of data from a scalar register into a scalar buffer surface. | ||
| s_buffer_store_dwordx2 | s_buffer_store_dwordx2 | SMEM | Store 64 bits of data from a scalar register into a scalar buffer surface. | ||
| s_buffer_store_dwordx4 | s_buffer_store_dwordx4 | SMEM | Store 128 bits of data from a scalar register into a scalar buffer surface. | ||
| s_call_b64 | s_call_b64 | SOPK | Store the address of the next instruction to a scalar register and then jump to a constant offset relative to the current PC. | ||
| s_call_i64 | s_call_i64 | SOPK | gfx1100 | AMDGPU SOPK scalar instruction operating on i64 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | |
| s_cbranch_cdbgsys | s_cbranch_cdbgsys | SOPP | If the system debug flag is set then jump to a constant offset relative to the current PC. | ||
| s_cbranch_cdbgsys_and_user | s_cbranch_cdbgsys_and_user | SOPP | If the system and user debug flag are set then jump to a constant offset relative to the current PC. | ||
| s_cbranch_cdbgsys_or_user | s_cbranch_cdbgsys_or_user | SOPP | If the system or user debug flag is set then jump to a constant offset relative to the current PC. | ||
| s_cbranch_cdbguser | s_cbranch_cdbguser | SOPP | If the user debug flag is set then jump to a constant offset relative to the current PC. | ||
| s_cbranch_execnz | s_cbranch_execnz | SOPP | If EXECZ is 0 then jump to a constant offset relative to the current PC. | ||
| s_cbranch_execz | s_cbranch_execz | SOPP | If EXECZ is 1 then jump to a constant offset relative to the current PC. | ||
| s_cbranch_g_fork | s_cbranch_g_fork | SOP2 | Conditional branch using branch-stack. | ||
| s_cbranch_i_fork | s_cbranch_i_fork | SOPK | Conditional branch using branch-stack. | ||
| s_cbranch_join | s_cbranch_join | SOP1 | Conditional branch join point (end of conditional branch block). | ||
| s_cbranch_scc0 | s_cbranch_scc0 | SOPP | If SCC is 0 then jump to a constant offset relative to the current PC. | ||
| s_cbranch_scc1 | s_cbranch_scc1 offset | SOPP | gfx942, gfx1100 | Scalar ALU | Conditional relative branch, taken when the SCC (scalar condition code) flag is set. |
| s_cbranch_vccnz | s_cbranch_vccnz | SOPP | If VCCZ is 0 then jump to a constant offset relative to the current PC. | ||
| s_cbranch_vccz | s_cbranch_vccz | SOPP | If VCCZ is 1 then jump to a constant offset relative to the current PC. | ||
| s_ceil_f16 | s_ceil_f16 | SOP1 | gfx1100 | Round the half-precision float input up to next integer and store the result in floating point format into a scalar register. | |
| s_ceil_f32 | s_ceil_f32 | SOP1 | gfx1100 | Round the single-precision float input up to next integer and store the result in floating point format into a scalar register. | |
| s_clause | s_clause | SOPP | Mark the beginning of a clause. | ||
| s_cls_i32 | s_cls_i32 | SOP1 | gfx1100 | Count the number of leading bits that are the same as the sign bit of a scalar input and store the result into a scalar register. | |
| s_cls_i32_i64 | s_cls_i32_i64 | SOP1 | gfx1100 | Count the number of leading bits that are the same as the sign bit of a scalar input and store the result into a scalar register. | |
| s_clz_i32_u32 | s_clz_i32_u32 | SOP1 | gfx1100 | Count the number of leading "0" bits before the first "1" in a scalar input and store the result into a scalar register. | |
| s_clz_i32_u64 | s_clz_i32_u64 | SOP1 | gfx1100 | Count the number of leading "0" bits before the first "1" in a scalar input and store the result into a scalar register. | |
| s_cmov_b32 | s_cmov_b32 | SOP1 | gfx1100 | Move scalar input into a scalar register iff SCC is nonzero. | |
| s_cmov_b64 | s_cmov_b64 | SOP1 | gfx1100 | Move scalar input into a scalar register iff SCC is nonzero. | |
| s_cmovk_i32 | s_cmovk_i32 | SOPK | gfx1100 | Move the sign extension of a literal 16-bit constant into a scalar register iff SCC is nonzero. | |
| s_cmp_eq_f16 | s_cmp_eq_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is equal to the second scalar input. | |
| s_cmp_eq_f32 | s_cmp_eq_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is equal to the second scalar input. | |
| s_cmp_eq_i32 | s_cmp_eq_i32 S0, S1 | SOPC | gfx942, gfx1100 | Scalar ALU | Scalar signed-32-bit equality compare, result written to SCC. |
| s_cmp_eq_u32 | s_cmp_eq_u32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is equal to the second scalar input. | |
| s_cmp_eq_u64 | s_cmp_eq_u64 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is equal to the second scalar input. | |
| s_cmp_ge_f16 | s_cmp_ge_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is greater than or equal to the second scalar input. | |
| s_cmp_ge_f32 | s_cmp_ge_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is greater than or equal to the second scalar input. | |
| s_cmp_ge_i32 | s_cmp_ge_i32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is greater than or equal to the second scalar input. | |
| s_cmp_ge_u32 | s_cmp_ge_u32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is greater than or equal to the second scalar input. | |
| s_cmp_gt_f16 | s_cmp_gt_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is greater than the second scalar input. | |
| s_cmp_gt_f32 | s_cmp_gt_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is greater than the second scalar input. | |
| s_cmp_gt_i32 | s_cmp_gt_i32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is greater than the second scalar input. | |
| s_cmp_gt_u32 | s_cmp_gt_u32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is greater than the second scalar input. | |
| s_cmp_le_f16 | s_cmp_le_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than or equal to the second scalar input. | |
| s_cmp_le_f32 | s_cmp_le_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than or equal to the second scalar input. | |
| s_cmp_le_i32 | s_cmp_le_i32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than or equal to the second scalar input. | |
| s_cmp_le_u32 | s_cmp_le_u32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than or equal to the second scalar input. | |
| s_cmp_lg_f16 | s_cmp_lg_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than or greater than the second scalar input. | |
| s_cmp_lg_f32 | s_cmp_lg_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than or greater than the second scalar input. | |
| s_cmp_lg_i32 | s_cmp_lg_i32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than or greater than the second scalar input. | |
| s_cmp_lg_u32 | s_cmp_lg_u32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than or greater than the second scalar input. | |
| s_cmp_lg_u64 | s_cmp_lg_u64 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than or greater than the second scalar input. | |
| s_cmp_lt_f16 | s_cmp_lt_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than the second scalar input. | |
| s_cmp_lt_f32 | s_cmp_lt_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than the second scalar input. | |
| s_cmp_lt_i32 | s_cmp_lt_i32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than the second scalar input. | |
| s_cmp_lt_u32 | s_cmp_lt_u32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is less than the second scalar input. | |
| s_cmp_neq_f16 | s_cmp_neq_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not equal to the second scalar input. | |
| s_cmp_neq_f32 | s_cmp_neq_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not equal to the second scalar input. | |
| s_cmp_nge_f16 | s_cmp_nge_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not greater than or equal to the second scalar input. | |
| s_cmp_nge_f32 | s_cmp_nge_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not greater than or equal to the second scalar input. | |
| s_cmp_ngt_f16 | s_cmp_ngt_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not greater than the second scalar input. | |
| s_cmp_ngt_f32 | s_cmp_ngt_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not greater than the second scalar input. | |
| s_cmp_nle_f16 | s_cmp_nle_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not less than or equal to the second scalar input. | |
| s_cmp_nle_f32 | s_cmp_nle_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not less than or equal to the second scalar input. | |
| s_cmp_nlg_f16 | s_cmp_nlg_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not less than or greater than the second scalar input. | |
| s_cmp_nlg_f32 | s_cmp_nlg_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not less than or greater than the second scalar input. | |
| s_cmp_nlt_f16 | s_cmp_nlt_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not less than the second scalar input. | |
| s_cmp_nlt_f32 | s_cmp_nlt_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not less than the second scalar input. | |
| s_cmp_o_f16 | s_cmp_o_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is orderable to the second scalar input. | |
| s_cmp_o_f32 | s_cmp_o_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is orderable to the second scalar input. | |
| s_cmp_u_f16 | s_cmp_u_f16 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not orderable to the second scalar input. | |
| s_cmp_u_f32 | s_cmp_u_f32 | SOPC | gfx1100 | Set SCC to 1 iff the first scalar input is not orderable to the second scalar input. | |
| s_cmpk_eq_i32 | s_cmpk_eq_i32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is equal to the sign extension of a literal 16-bit constant. | |
| s_cmpk_eq_u32 | s_cmpk_eq_u32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is equal to the zero extension of a literal 16-bit constant. | |
| s_cmpk_ge_i32 | s_cmpk_ge_i32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is greater than or equal to the sign extension of a literal 16-bit constant. | |
| s_cmpk_ge_u32 | s_cmpk_ge_u32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is greater than or equal to the zero extension of a literal 16-bit constant. | |
| s_cmpk_gt_i32 | s_cmpk_gt_i32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is greater than the sign extension of a literal 16-bit constant. | |
| s_cmpk_gt_u32 | s_cmpk_gt_u32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is greater than the zero extension of a literal 16-bit constant. | |
| s_cmpk_le_i32 | s_cmpk_le_i32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is less than or equal to the sign extension of a literal 16-bit constant. | |
| s_cmpk_le_u32 | s_cmpk_le_u32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is less than or equal to the zero extension of a literal 16-bit constant. | |
| s_cmpk_lg_i32 | s_cmpk_lg_i32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is less than or greater than the sign extension of a literal 16-bit constant. | |
| s_cmpk_lg_u32 | s_cmpk_lg_u32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is less than or greater than the zero extension of a literal 16-bit constant. | |
| s_cmpk_lt_i32 | s_cmpk_lt_i32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is less than the sign extension of a literal 16-bit constant. | |
| s_cmpk_lt_u32 | s_cmpk_lt_u32 | SOPK | gfx1100 | Set SCC to 1 iff scalar input is less than the zero extension of a literal 16-bit constant. | |
| s_code_end | s_code_end | SOPP | Generate an illegal instruction interrupt. This instruction is used to mark the end of a shader buffer for debug tools. | ||
| s_cselect_b32 | s_cselect_b32 | SOP2 | gfx1100 | Select the first input if SCC is true otherwise select the second input, then store the selected input into a scalar register. | |
| s_cselect_b64 | s_cselect_b64 | SOP2 | gfx1100 | Select the first input if SCC is true otherwise select the second input, then store the selected input into a scalar register. | |
| s_ctz_i32_b32 | s_ctz_i32_b32 | SOP1 | gfx1100 | Count the number of trailing "0" bits before the first "1" in a scalar input and store the result into a scalar register. | |
| s_ctz_i32_b64 | s_ctz_i32_b64 | SOP1 | gfx1100 | Count the number of trailing "0" bits before the first "1" in a scalar input and store the result into a scalar register. | |
| s_cvt_f16_f32 | s_cvt_f16_f32 | SOP1 | gfx1100 | Convert from a single-precision float input to a half-precision float value and store the result into a scalar register. | |
| s_cvt_f32_f16 | s_cvt_f32_f16 | SOP1 | gfx1100 | Convert from a half-precision float input to a single-precision float value and store the result into a scalar register. | |
| s_cvt_f32_i32 | s_cvt_f32_i32 | SOP1 | gfx1100 | Convert from a signed 32-bit integer input to a single-precision float value and store the result into a scalar register. | |
| s_cvt_f32_u32 | s_cvt_f32_u32 | SOP1 | gfx1100 | Convert from an unsigned 32-bit integer input to a single-precision float value and store the result into a scalar register. | |
| s_cvt_hi_f32_f16 | s_cvt_hi_f32_f16 | SOP1 | gfx1100 | Convert from a half-precision float value in the high 16 bits of a scalar input to a single-precision float value and store the result into a scalar… |
Source
Normalized from AMD's official ROCm documentation, with the LLVM AMDGPU backend documentation as supplementary compiler-target information. ROCm documentation ↗