AMDGPU / GFX Instructions GPU Native ISA AMD
2442 instructions - showing 100 per page, page 9 of 25 - AMDGPU/GFX is AMD's native, low-level
GPU instruction set family, assembled directly with no virtual intermediate layer. Supported
instructions and their exact encodings vary by GFX compatibility target (e.g.
gfx942, gfx1100). Scalar instructions execute once per wavefront on
the Scalar ALU; vector instructions execute per-lane on the Vector ALU, gated by the EXEC mask.
How AMDGPU compares to the other GPU ISA
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| Mnemonic | Syntax | Format | GFX Targets | Unit | Summary |
|---|---|---|---|---|---|
| s_andn1_wrexec_b64 | s_andn1_wrexec_b64 | SOP1 | gfx1100 | Calculate bitwise AND on the EXEC mask and the negation of the scalar input, store the calculated result into the EXEC mask and also into the scalar… | |
| s_andn2_b32 | s_andn2_b32 | SOP2 | gfx1100 | Calculate bitwise AND with the first input and the negation of the second input, store the result into a scalar register and set SCC if the result is… | |
| s_andn2_b64 | s_andn2_b64 | SOP2 | gfx1100 | Calculate bitwise AND with the first input and the negation of the second input, store the result into a scalar register and set SCC if the result is… | |
| s_andn2_saveexec_b32 | s_andn2_saveexec_b32 | SOP1 | gfx1100 | Calculate bitwise AND on the scalar input and the negation of the EXEC mask, store the calculated result into the EXEC mask, set SCC iff the… | |
| s_andn2_saveexec_b64 | s_andn2_saveexec_b64 | SOP1 | gfx1100 | Calculate bitwise AND on the scalar input and the negation of the EXEC mask, store the calculated result into the EXEC mask, set SCC iff the… | |
| s_andn2_wrexec_b32 | s_andn2_wrexec_b32 | SOP1 | gfx1100 | Calculate bitwise AND on the scalar input and the negation of the EXEC mask, store the calculated result into the EXEC mask and also into the scalar… | |
| s_andn2_wrexec_b64 | s_andn2_wrexec_b64 | SOP1 | gfx1100 | Calculate bitwise AND on the scalar input and the negation of the EXEC mask, store the calculated result into the EXEC mask and also into the scalar… | |
| s_ashr_i32 | s_ashr_i32 | SOP2 | gfx1100 | Given a shift count in the second scalar input, calculate the arithmetic shift right (preserving sign bit) of the first scalar input, store the… | |
| s_ashr_i64 | s_ashr_i64 | SOP2 | gfx1100 | Given a shift count in the second scalar input, calculate the arithmetic shift right (preserving sign bit) of the first scalar input, store the… | |
| s_atc_probe | s_atc_probe | SMEM | Probe or prefetch an address into the scalar data cache. | ||
| s_atc_probe_buffer | s_atc_probe_buffer | SMEM | Probe or prefetch an address into the scalar data cache. | ||
| s_atomic_add | s_atomic_add | SMEM | Add two unsigned 32-bit integer values stored in the data register and a location in the scalar memory. | ||
| s_atomic_add_x2 | s_atomic_add_x2 | SMEM | Add two unsigned 64-bit integer values stored in the data register and a location in the scalar memory. | ||
| s_atomic_and | s_atomic_and | SMEM | Calculate bitwise AND given two unsigned 32-bit integer values stored in the data register and a location in the scalar memory. | ||
| s_atomic_and_x2 | s_atomic_and_x2 | SMEM | Calculate bitwise AND given two unsigned 64-bit integer values stored in the data register and a location in the scalar memory. | ||
| s_atomic_cmpswap | s_atomic_cmpswap | SMEM | Compare two unsigned 32-bit integer values stored in the data comparison register and a location in the scalar memory. | ||
| s_atomic_cmpswap_x2 | s_atomic_cmpswap_x2 | SMEM | Compare two unsigned 64-bit integer values stored in the data comparison register and a location in the scalar memory. | ||
| s_atomic_dec | s_atomic_dec | SMEM | Decrement an unsigned 32-bit integer value from a location in the scalar memory with wraparound to a value in the data register if the decrement… | ||
| s_atomic_dec_x2 | s_atomic_dec_x2 | SMEM | Decrement an unsigned 64-bit integer value from a location in the scalar memory with wraparound to a value in the data register if the decrement… | ||
| s_atomic_inc | s_atomic_inc | SMEM | Increment an unsigned 32-bit integer value from a location in the scalar memory with wraparound to 0 if the value exceeds a value in the data… | ||
| s_atomic_inc_x2 | s_atomic_inc_x2 | SMEM | Increment an unsigned 64-bit integer value from a location in the scalar memory with wraparound to 0 if the value exceeds a value in the data… | ||
| s_atomic_or | s_atomic_or | SMEM | Calculate bitwise OR given two unsigned 32-bit integer values stored in the data register and a location in the scalar memory. | ||
| s_atomic_or_x2 | s_atomic_or_x2 | SMEM | Calculate bitwise OR given two unsigned 64-bit integer values stored in the data register and a location in the scalar memory. | ||
| s_atomic_smax | s_atomic_smax | SMEM | Select the maximum of two signed 32-bit integer inputs, given two values stored in the data register and a location in the scalar memory. | ||
| s_atomic_smax_x2 | s_atomic_smax_x2 | SMEM | Select the maximum of two signed 64-bit integer inputs, given two values stored in the data register and a location in the scalar memory. | ||
| s_atomic_smin | s_atomic_smin | SMEM | Select the minimum of two signed 32-bit integer inputs, given two values stored in the data register and a location in the scalar memory. | ||
| s_atomic_smin_x2 | s_atomic_smin_x2 | SMEM | Select the minimum of two signed 64-bit integer inputs, given two values stored in the data register and a location in the scalar memory. | ||
| s_atomic_sub | s_atomic_sub | SMEM | Subtract an unsigned 32-bit integer value stored in the data register from a value stored in a location in the scalar memory. | ||
| s_atomic_sub_x2 | s_atomic_sub_x2 | SMEM | Subtract an unsigned 64-bit integer value stored in the data register from a value stored in a location in the scalar memory. | ||
| s_atomic_swap | s_atomic_swap | SMEM | Swap an unsigned 32-bit integer value in the data register with a location in the scalar memory. | ||
| s_atomic_swap_x2 | s_atomic_swap_x2 | SMEM | Swap an unsigned 64-bit integer value in the data register with a location in the scalar memory. | ||
| s_atomic_umax | s_atomic_umax | SMEM | Select the maximum of two unsigned 32-bit integer inputs, given two values stored in the data register and a location in the scalar memory. | ||
| s_atomic_umax_x2 | s_atomic_umax_x2 | SMEM | Select the maximum of two unsigned 64-bit integer inputs, given two values stored in the data register and a location in the scalar memory. | ||
| s_atomic_umin | s_atomic_umin | SMEM | Select the minimum of two unsigned 32-bit integer inputs, given two values stored in the data register and a location in the scalar memory. | ||
| s_atomic_umin_x2 | s_atomic_umin_x2 | SMEM | Select the minimum of two unsigned 64-bit integer inputs, given two values stored in the data register and a location in the scalar memory. | ||
| s_atomic_xor | s_atomic_xor | SMEM | Calculate bitwise XOR given two unsigned 32-bit integer values stored in the data register and a location in the scalar memory. | ||
| s_atomic_xor_x2 | s_atomic_xor_x2 | SMEM | Calculate bitwise XOR given two unsigned 64-bit integer values stored in the data register and a location in the scalar memory. | ||
| s_barrier | s_barrier | SOPP | gfx942, gfx1100 | Scalar ALU | Synchronize all waves of the executing workgroup at this point. |
| s_barrier_init | s_barrier_init | SOP1 | AMDGPU SOP1 scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| s_barrier_join | s_barrier_join | SOP1 | AMDGPU SOP1 scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| s_barrier_leave | s_barrier_leave | SOPP | AMDGPU SOPP scalar instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| s_barrier_signal | s_barrier_signal | SOP1 | Signal that a wave has arrived at a barrier . The argument specifies which barrier to signal. | ||
| s_barrier_signal_isfirst | s_barrier_signal_isfirst | SOP1 | Signal that a wave has arrived at a barrier and set SCC to indicate if this is the first wave to signal the barrier. | ||
| s_barrier_wait | s_barrier_wait | SOPP | Wait for a barrier to complete. The SIMM16 argument specifies which barrier to wait on. | ||
| s_bcnt0_i32_b32 | s_bcnt0_i32_b32 | SOP1 | gfx1100 | Count the number of "0" bits in a scalar input, store the result into a scalar register and set SCC iff the result is nonzero. | |
| s_bcnt0_i32_b64 | s_bcnt0_i32_b64 | SOP1 | gfx1100 | Count the number of "0" bits in a scalar input, store the result into a scalar register and set SCC iff the result is nonzero. | |
| s_bcnt1_i32_b32 | s_bcnt1_i32_b32 | SOP1 | gfx1100 | Count the number of "1" bits in a scalar input, store the result into a scalar register and set SCC iff the result is nonzero. | |
| s_bcnt1_i32_b64 | s_bcnt1_i32_b64 | SOP1 | gfx1100 | Count the number of "1" bits in a scalar input, store the result into a scalar register and set SCC iff the result is nonzero. | |
| s_bfe_i32 | s_bfe_i32 | SOP2 | gfx1100 | Extract a signed bitfield from the first input using field offset and size encoded in the second input, store the result into a scalar register and… | |
| s_bfe_i64 | s_bfe_i64 | SOP2 | gfx1100 | Extract a signed bitfield from the first input using field offset and size encoded in the second input, store the result into a scalar register and… | |
| s_bfe_u32 | s_bfe_u32 | SOP2 | gfx1100 | Extract an unsigned bitfield from the first input using field offset and size encoded in the second input, store the result into a scalar register… | |
| s_bfe_u64 | s_bfe_u64 | SOP2 | gfx1100 | Extract an unsigned bitfield from the first input using field offset and size encoded in the second input, store the result into a scalar register… | |
| s_bfm_b32 | s_bfm_b32 | SOP2 | gfx1100 | Calculate a bitfield mask given a field offset and size and store the result in a scalar register. | |
| s_bfm_b64 | s_bfm_b64 | SOP2 | gfx1100 | Calculate a bitfield mask given a field offset and size and store the result in a scalar register. | |
| s_bitcmp0_b32 | s_bitcmp0_b32 | SOPC | gfx1100 | Extract a bit from the first scalar input based on an index in the second scalar input, and set SCC to 1 iff the extracted bit is equal to 0. | |
| s_bitcmp0_b64 | s_bitcmp0_b64 | SOPC | gfx1100 | Extract a bit from the first scalar input based on an index in the second scalar input, and set SCC to 1 iff the extracted bit is equal to 0. | |
| s_bitcmp1_b32 | s_bitcmp1_b32 | SOPC | gfx1100 | Extract a bit from the first scalar input based on an index in the second scalar input, and set SCC to 1 iff the extracted bit is equal to 1. | |
| s_bitcmp1_b64 | s_bitcmp1_b64 | SOPC | gfx1100 | Extract a bit from the first scalar input based on an index in the second scalar input, and set SCC to 1 iff the extracted bit is equal to 1. | |
| s_bitreplicate_b64_b32 | s_bitreplicate_b64_b32 | SOP1 | gfx1100 | Substitute each bit of a 32 bit scalar input with two instances of itself and store the result into a 64 bit scalar register. | |
| s_bitset0_b32 | s_bitset0_b32 | SOP1 | gfx1100 | Given a bit offset in a scalar input, set the indicated bit in the destination scalar register to 0. | |
| s_bitset0_b64 | s_bitset0_b64 | SOP1 | gfx1100 | Given a bit offset in a scalar input, set the indicated bit in the destination scalar register to 0. | |
| s_bitset1_b32 | s_bitset1_b32 | SOP1 | gfx1100 | Given a bit offset in a scalar input, set the indicated bit in the destination scalar register to 1. | |
| s_bitset1_b64 | s_bitset1_b64 | SOP1 | gfx1100 | Given a bit offset in a scalar input, set the indicated bit in the destination scalar register to 1. | |
| s_branch | s_branch offset | SOPP | gfx942, gfx1100 | Scalar ALU | Unconditional relative branch. |
| s_brev_b32 | s_brev_b32 | SOP1 | gfx1100 | Reverse the order of bits in a scalar input and store the result into a scalar register. | |
| s_brev_b64 | s_brev_b64 | SOP1 | gfx1100 | Reverse the order of bits in a scalar input and store the result into a scalar register. | |
| s_buffer_atomic_add | s_buffer_atomic_add | SMEM | Add two unsigned 32-bit integer values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_add_x2 | s_buffer_atomic_add_x2 | SMEM | Add two unsigned 64-bit integer values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_and | s_buffer_atomic_and | SMEM | Calculate bitwise AND given two unsigned 32-bit integer values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_and_x2 | s_buffer_atomic_and_x2 | SMEM | Calculate bitwise AND given two unsigned 64-bit integer values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_cmpswap | s_buffer_atomic_cmpswap | SMEM | Compare two unsigned 32-bit integer values stored in the data comparison register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_cmpswap_x2 | s_buffer_atomic_cmpswap_x2 | SMEM | Compare two unsigned 64-bit integer values stored in the data comparison register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_dec | s_buffer_atomic_dec | SMEM | Decrement an unsigned 32-bit integer value from a location in a scalar buffer surface with wraparound to a value in the data register if the… | ||
| s_buffer_atomic_dec_x2 | s_buffer_atomic_dec_x2 | SMEM | Decrement an unsigned 64-bit integer value from a location in a scalar buffer surface with wraparound to a value in the data register if the… | ||
| s_buffer_atomic_inc | s_buffer_atomic_inc | SMEM | Increment an unsigned 32-bit integer value from a location in a scalar buffer surface with wraparound to 0 if the value exceeds a value in the data… | ||
| s_buffer_atomic_inc_x2 | s_buffer_atomic_inc_x2 | SMEM | Increment an unsigned 64-bit integer value from a location in a scalar buffer surface with wraparound to 0 if the value exceeds a value in the data… | ||
| s_buffer_atomic_or | s_buffer_atomic_or | SMEM | Calculate bitwise OR given two unsigned 32-bit integer values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_or_x2 | s_buffer_atomic_or_x2 | SMEM | Calculate bitwise OR given two unsigned 64-bit integer values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_smax | s_buffer_atomic_smax | SMEM | Select the maximum of two signed 32-bit integer inputs, given two values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_smax_x2 | s_buffer_atomic_smax_x2 | SMEM | Select the maximum of two signed 64-bit integer inputs, given two values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_smin | s_buffer_atomic_smin | SMEM | Select the minimum of two signed 32-bit integer inputs, given two values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_smin_x2 | s_buffer_atomic_smin_x2 | SMEM | Select the minimum of two signed 64-bit integer inputs, given two values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_sub | s_buffer_atomic_sub | SMEM | Subtract an unsigned 32-bit integer value stored in the data register from a value stored in a location in a scalar buffer surface. | ||
| s_buffer_atomic_sub_x2 | s_buffer_atomic_sub_x2 | SMEM | Subtract an unsigned 64-bit integer value stored in the data register from a value stored in a location in a scalar buffer surface. | ||
| s_buffer_atomic_swap | s_buffer_atomic_swap | SMEM | Swap an unsigned 32-bit integer value in the data register with a location in a scalar buffer surface. | ||
| s_buffer_atomic_swap_x2 | s_buffer_atomic_swap_x2 | SMEM | Swap an unsigned 64-bit integer value in the data register with a location in a scalar buffer surface. | ||
| s_buffer_atomic_umax | s_buffer_atomic_umax | SMEM | Select the maximum of two unsigned 32-bit integer inputs, given two values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_umax_x2 | s_buffer_atomic_umax_x2 | SMEM | Select the maximum of two unsigned 64-bit integer inputs, given two values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_umin | s_buffer_atomic_umin | SMEM | Select the minimum of two unsigned 32-bit integer inputs, given two values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_umin_x2 | s_buffer_atomic_umin_x2 | SMEM | Select the minimum of two unsigned 64-bit integer inputs, given two values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_xor | s_buffer_atomic_xor | SMEM | Calculate bitwise XOR given two unsigned 32-bit integer values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_atomic_xor_x2 | s_buffer_atomic_xor_x2 | SMEM | Calculate bitwise XOR given two unsigned 64-bit integer values stored in the data register and a location in a scalar buffer surface. | ||
| s_buffer_load_b128 | s_buffer_load_b128 | SMEM | Load 128 bits of data from a scalar buffer surface into a scalar register. | ||
| s_buffer_load_b256 | s_buffer_load_b256 | SMEM | Load 256 bits of data from a scalar buffer surface into a scalar register. | ||
| s_buffer_load_b32 | s_buffer_load_b32 | SMEM | Load 32 bits of data from a scalar buffer surface into a scalar register. | ||
| s_buffer_load_b512 | s_buffer_load_b512 | SMEM | Load 512 bits of data from a scalar buffer surface into a scalar register. | ||
| s_buffer_load_b64 | s_buffer_load_b64 | SMEM | Load 64 bits of data from a scalar buffer surface into a scalar register. | ||
| s_buffer_load_b96 | s_buffer_load_b96 | SMEM | Load 96 bits of data from a scalar buffer surface into a scalar register. | ||
| s_buffer_load_dword | s_buffer_load_dword | SMEM | Load 32 bits of data from a scalar buffer surface into a scalar register. | ||
| s_buffer_load_dwordx16 | s_buffer_load_dwordx16 | SMEM | Load 512 bits of data from a scalar buffer surface into a scalar register. |
Source
Normalized from AMD's official ROCm documentation, with the LLVM AMDGPU backend documentation as supplementary compiler-target information. ROCm documentation ↗