AMDGPU / GFX Instructions GPU Native ISA AMD
2442 instructions - showing 100 per page, page 8 of 25 - AMDGPU/GFX is AMD's native, low-level
GPU instruction set family, assembled directly with no virtual intermediate layer. Supported
instructions and their exact encodings vary by GFX compatibility target (e.g.
gfx942, gfx1100). Scalar instructions execute once per wavefront on
the Scalar ALU; vector instructions execute per-lane on the Vector ALU, gated by the EXEC mask.
How AMDGPU compares to the other GPU ISA
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| Mnemonic | Syntax | Format | GFX Targets | Unit | Summary |
|---|---|---|---|---|---|
| image_sample_b_cl_o | image_sample_b_cl_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_b_o | image_sample_b_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c | image_sample_c | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_b | image_sample_c_b | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_b_cl | image_sample_c_b_cl | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_b_cl_o | image_sample_c_b_cl_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_b_o | image_sample_c_b_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_cd | image_sample_c_cd | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_cd_cl | image_sample_c_cd_cl | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_cd_cl_g16 | image_sample_c_cd_cl_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_cd_cl_o | image_sample_c_cd_cl_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_cd_cl_o_g16 | image_sample_c_cd_cl_o_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_cd_g16 | image_sample_c_cd_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_cd_o | image_sample_c_cd_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_cd_o_g16 | image_sample_c_cd_o_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_cl | image_sample_c_cl | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_cl_o | image_sample_c_cl_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_d | image_sample_c_d | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_d_cl | image_sample_c_d_cl | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_d_cl_g16 | image_sample_c_d_cl_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_d_cl_o | image_sample_c_d_cl_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_d_cl_o_g16 | image_sample_c_d_cl_o_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_d_g16 | image_sample_c_d_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_d_o | image_sample_c_d_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_d_o_g16 | image_sample_c_d_o_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_l | image_sample_c_l | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_l_o | image_sample_c_l_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_lz | image_sample_c_lz | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_lz_o | image_sample_c_lz_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_c_o | image_sample_c_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_cd | image_sample_cd | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_cd_cl | image_sample_cd_cl | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_cd_cl_g16 | image_sample_cd_cl_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_cd_cl_o | image_sample_cd_cl_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_cd_cl_o_g16 | image_sample_cd_cl_o_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_cd_g16 | image_sample_cd_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_cd_o | image_sample_cd_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_cd_o_g16 | image_sample_cd_o_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_cl | image_sample_cl | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_cl_o | image_sample_cl_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_d | image_sample_d | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_d_cl | image_sample_d_cl | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_d_cl_g16 | image_sample_d_cl_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_d_cl_o | image_sample_d_cl_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_d_cl_o_g16 | image_sample_d_cl_o_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_d_g16 | image_sample_d_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_d_o | image_sample_d_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_d_o_g16 | image_sample_d_o_g16 | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_l | image_sample_l | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_l_o | image_sample_l_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_lz | image_sample_lz | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_lz_o | image_sample_lz_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_sample_o | image_sample_o | MIMG | Sample texels from an image surface using texel coordinates provided by the address input registers and store the result into vector registers. | ||
| image_store | image_store | MIMG | Store a texel from a vector register to the largest miplevel in an image surface. | ||
| image_store_by2 | image_store_by2 | MIMG | Store 2 horizontal elements from a vector register to the largest miplevel in an image surface. | ||
| image_store_by4 | image_store_by4 | MIMG | Store 4 horizontal elements from a vector register to the largest miplevel in an image surface. | ||
| image_store_mip | image_store_mip | MIMG | Store a texel from a vector register to a user-specified miplevel in an image surface. | ||
| image_store_mip_by2 | image_store_mip_by2 | MIMG | Store 2 horizontal elements from a vector register to a user-specified miplevel in an image surface. | ||
| image_store_mip_by4 | image_store_mip_by4 | MIMG | Store 4 horizontal elements from a vector register to a user-specified miplevel in an image surface. | ||
| image_store_mip_pck | image_store_mip_pck | MIMG | Store a texel from a vector register to a user-specified miplevel in an image surface. | ||
| image_store_mip_pck2 | image_store_mip_pck2 | MIMG | Store 2 horizontal elements from a vector register to a user-specified miplevel in an image surface. | ||
| image_store_mip_pck4 | image_store_mip_pck4 | MIMG | Store 4 horizontal elements from a vector register to a user-specified miplevel in an image surface. | ||
| image_store_pck | image_store_pck | MIMG | Store a texel from a vector register to the largest miplevel in an image surface. | ||
| image_store_pck2 | image_store_pck2 | MIMG | Store 2 horizontal elements from a vector register to the largest miplevel in an image surface. | ||
| image_store_pck4 | image_store_pck4 | MIMG | Store 4 horizontal elements from a vector register to the largest miplevel in an image surface. | ||
| lds_direct_load | lds_direct_load | DSDIR | gfx1100 | Read a single 32-bit value from LDS to all lanes. | |
| lds_param_load | lds_param_load | DSDIR | gfx1100 | Transfer parameter data from LDS to VGPRs and expand data in LDS using the NewPrimMask (provided in M0) to place per-quad data into lanes 0-3 of each… | |
| s_abs_i32 | s_abs_i32 | SOP1 | gfx1100 | Compute the absolute value of a scalar input, store the result into a scalar register and set SCC iff the result is nonzero. | |
| s_absdiff_i32 | s_absdiff_i32 | SOP2 | gfx1100 | Calculate the absolute value of difference between two scalar inputs, store the result into a scalar register and set SCC iff the result is nonzero. | |
| s_add_co_ci_u32 | s_add_co_ci_u32 | SOP2 | gfx1100 | Add two unsigned 32-bit integer inputs and a carry-in bit from SCC, store the result into a scalar register and store the carry-out bit into SCC. | |
| s_add_co_i32 | s_add_co_i32 | SOP2 | gfx1100 | Add two signed 32-bit integer inputs, store the result into a scalar register and store the carry-out bit into SCC. | |
| s_add_co_u32 | s_add_co_u32 | SOP2 | gfx1100 | Add two unsigned 32-bit integer inputs, store the result into a scalar register and store the carry-out bit into SCC. | |
| s_add_f16 | s_add_f16 | SOP2 | gfx1100 | Add two floating point inputs and store the result into a scalar register. | |
| s_add_f32 | s_add_f32 | SOP2 | gfx1100 | Add two floating point inputs and store the result into a scalar register. | |
| s_add_i32 | s_add_i32 | SOP2 | gfx1100 | Add two signed 32-bit integer inputs, store the result into a scalar register and store the carry-out bit into SCC. | |
| s_add_nc_u64 | s_add_nc_u64 | SOP2 | Add two unsigned 64-bit integer inputs and store the result into a scalar register. | ||
| s_add_pc_i64 | s_add_pc_i64 | SOP1 | AMDGPU SOP1 scalar instruction operating on i64 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| s_add_u32 | s_add_u32 SDST, S0, S1 | SOP2 | gfx942, gfx1100 | Scalar ALU | Add two 32-bit unsigned scalar operands, wavefront-uniform. |
| s_add_u64 | s_add_u64 | SOP2 | AMDGPU SOP2 scalar instruction operating on u64 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) | ||
| s_addc_u32 | s_addc_u32 | SOP2 | gfx1100 | Add two unsigned 32-bit integer inputs and a carry-in bit from SCC, store the result into a scalar register and store the carry-out bit into SCC. | |
| s_addk_co_i32 | s_addk_co_i32 | SOPK | gfx1100 | Add a scalar input and the sign extension of a literal 16-bit constant, store the result into a scalar register and store the carry-out bit into SCC. | |
| s_addk_i32 | s_addk_i32 | SOPK | gfx1100 | Add a scalar input and the sign extension of a literal 16-bit constant, store the result into a scalar register and store the carry-out bit into SCC. | |
| s_alloc_vgpr | s_alloc_vgpr | SOP1 | Attempt to set the wave's VGPR allocation to the specified number of VGPRs (or greater). | ||
| s_and_b32 | s_and_b32 | SOP2 | gfx1100 | Calculate bitwise AND on two scalar inputs, store the result into a scalar register and set SCC iff the result is nonzero. | |
| s_and_b64 | s_and_b64 | SOP2 | gfx1100 | Calculate bitwise AND on two scalar inputs, store the result into a scalar register and set SCC iff the result is nonzero. | |
| s_and_not0_saveexec_b32 | s_and_not0_saveexec_b32 | SOP1 | gfx1100 | Calculate bitwise AND on the EXEC mask and the negation of the scalar input, store the calculated result into the EXEC mask, set SCC iff the… | |
| s_and_not0_saveexec_b64 | s_and_not0_saveexec_b64 | SOP1 | gfx1100 | Calculate bitwise AND on the EXEC mask and the negation of the scalar input, store the calculated result into the EXEC mask, set SCC iff the… | |
| s_and_not0_wrexec_b32 | s_and_not0_wrexec_b32 | SOP1 | gfx1100 | Calculate bitwise AND on the EXEC mask and the negation of the scalar input, store the calculated result into the EXEC mask and also into the scalar… | |
| s_and_not0_wrexec_b64 | s_and_not0_wrexec_b64 | SOP1 | gfx1100 | Calculate bitwise AND on the EXEC mask and the negation of the scalar input, store the calculated result into the EXEC mask and also into the scalar… | |
| s_and_not1_b32 | s_and_not1_b32 | SOP2 | gfx1100 | Calculate bitwise AND with the first input and the negation of the second input, store the result into a scalar register and set SCC if the result is… | |
| s_and_not1_b64 | s_and_not1_b64 | SOP2 | gfx1100 | Calculate bitwise AND with the first input and the negation of the second input, store the result into a scalar register and set SCC if the result is… | |
| s_and_not1_saveexec_b32 | s_and_not1_saveexec_b32 | SOP1 | gfx1100 | Calculate bitwise AND on the scalar input and the negation of the EXEC mask, store the calculated result into the EXEC mask, set SCC iff the… | |
| s_and_not1_saveexec_b64 | s_and_not1_saveexec_b64 | SOP1 | gfx1100 | Calculate bitwise AND on the scalar input and the negation of the EXEC mask, store the calculated result into the EXEC mask, set SCC iff the… | |
| s_and_not1_wrexec_b32 | s_and_not1_wrexec_b32 | SOP1 | gfx1100 | Calculate bitwise AND on the scalar input and the negation of the EXEC mask, store the calculated result into the EXEC mask and also into the scalar… | |
| s_and_not1_wrexec_b64 | s_and_not1_wrexec_b64 | SOP1 | gfx1100 | Calculate bitwise AND on the scalar input and the negation of the EXEC mask, store the calculated result into the EXEC mask and also into the scalar… | |
| s_and_saveexec_b32 | s_and_saveexec_b32 | SOP1 | gfx1100 | Calculate bitwise AND on the scalar input and the EXEC mask, store the calculated result into the EXEC mask, set SCC iff the calculated result is… | |
| s_and_saveexec_b64 | s_and_saveexec_b64 | SOP1 | gfx1100 | Calculate bitwise AND on the scalar input and the EXEC mask, store the calculated result into the EXEC mask, set SCC iff the calculated result is… | |
| s_andn1_saveexec_b32 | s_andn1_saveexec_b32 | SOP1 | gfx1100 | Calculate bitwise AND on the EXEC mask and the negation of the scalar input, store the calculated result into the EXEC mask, set SCC iff the… | |
| s_andn1_saveexec_b64 | s_andn1_saveexec_b64 | SOP1 | gfx1100 | Calculate bitwise AND on the EXEC mask and the negation of the scalar input, store the calculated result into the EXEC mask, set SCC iff the… | |
| s_andn1_wrexec_b32 | s_andn1_wrexec_b32 | SOP1 | gfx1100 | Calculate bitwise AND on the EXEC mask and the negation of the scalar input, store the calculated result into the EXEC mask and also into the scalar… |
Source
Normalized from AMD's official ROCm documentation, with the LLVM AMDGPU backend documentation as supplementary compiler-target information. ROCm documentation ↗