s_mul_u64 GPU Native ISA AMD Scalar
S MUL U64 Scalar Arithmetic
s_mul_u64
Multiply two unsigned 64-bit integer inputs and store the result into a scalar register.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (SOP2)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related
More in Scalar Arithmetic
Reference
AMDGPU / GFX ISA
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
- AMD Machine-Readable GPU ISA Specification ↗ - Advanced Micro Devices, Inc.