s_nor_saveexec_b64 GPU Native ISA AMD Scalar
S NOR SAVEEXEC B64 Scalar Arithmetic
s_nor_saveexec_b64
Calculate bitwise NOR on the scalar input and the EXEC mask, store the calculated result into the EXEC mask, set SCC iff the calculated result is…
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (SOP1)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
| Target | Support |
|---|---|
| gfx1100 | ✅ Supported |
Related
More in Scalar Arithmetic
Reference
AMDGPU / GFX ISA
Description
Calculate bitwise NOR on the scalar input and the EXEC mask, store the calculated result into the EXEC mask, set SCC iff the calculated result is nonzero and store the original value of the EXEC mask into the scalar destination register.
Semantics
saveexec = EXEC.u64;
EXEC.u64 = ~(S0.u64 | EXEC.u64);
D0.u64 = saveexec.u64;
SCC = EXEC.u64 != 0ULL
Example
s_nor_saveexec_b64 s[0:1], 0A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite (gfx11). Not from an AMD document, and not authored here.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 126. - LLVM MC assembler tests for AMDGPU (gfx11) ↗ - LLVM Project