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ARM Opcode Map

Reverse lookup instructions by their hexadecimal encoding.

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Opcode Mnemonic Syntax Format Name
0x2EA01C00 bit BIT <Vd>.<T>, <Vn>.<T>, <Vm>.<T> SIMD Three Register Bitwise Insert if True
0xBE00 bkpt BKPT #<imm> Thumb System Breakpoint (Thumb)
0x01200070 bkpt BKPT #<imm> System Breakpoint (A32)
0x94000000 bl BL <label> Branch Branch with Link
0x0B000000 bl BL<c> <label> Branch Branch with Link (A32)
0xF000D000 bl.w BL.W <label> Thumb Branch Branch with Link (Wide)
0xD63F0000 blr BLR <Xn> Branch (Reg) Branch with Link to Register
0x012FFF30 blx BLX<c> <Rm> Branch Branch with Link and Exchange
0xD61F0000 br BR <Xn> Branch (Reg) Branch to Register
0xD5097200 brb BRB <op> System Branch Record Buffer Injection
0xD4200000 brk BRK #<imm> Exception Breakpoint
0x25104000 brka BRKA <Pd>.B, <Pg>/Z, <Pn>.B SVE Predicate SVE Break After First True
0x25904000 brkb BRKB <Pd>.B, <Pg>/Z, <Pn>.B SVE Predicate SVE Break Before First True
0x2E601C00 bsl BSL <Vd>.<T>, <Vn>.<T>, <Vm>.<T> SIMD Three Register Bitwise Select
0xD503241F bti BTI <target> System Hint Branch Target Identification
0xD503241F bti BTI {<target>} System Branch Target Identification
0x012FFF10 bx BX<c> <Rm> Branch Branch and Exchange
0x012FFF20 bxj BXJ<c> <Rm> Branch Branch and Exchange Jazelle (A32)
0x88A07C00 cas CAS <Ws>, <Wt>, [<Xn|SP>] Atomic Compare and Swap Word
0xC8A07C00 cas CAS <Xs>, <Xt>, [<Xn|SP>] Atomic Compare and Swap Doubleword
0x88E07C00 casa CASA <Ws>, <Wt>, [<Xn|SP>] Atomic Compare and Swap Word (Acquire)
0x88E0FC00 casal CASAL <Ws>, <Wt>, [<Xn|SP>] Atomic Compare and Swap Word (Acquire-Release)
0x88A0FC00 casl CASL <Ws>, <Wt>, [<Xn|SP>] Atomic Compare and Swap Word (Release)
0x48207C00 casp CASP <Ws>, <W(s+1)>, <Wt>, <W(t+1)>, [<Xn|SP>] Atomic Compare and Swap Pair
0x35000000 cbnz CBNZ <Wt>, <label> Branch Compare and Branch Not Zero
0xB5000000 cbnz CBNZ <Xt>, <label> Branch Compare and Branch Not Zero (64-bit)
0xB900 cbnz CBNZ <Rn>, <label> Thumb Branch Compare and Branch Non-Zero (Thumb)
0x34000000 cbz CBZ <Wt>, <label> Branch Compare and Branch Zero
0xB4000000 cbz CBZ <Xt>, <label> Branch Compare and Branch Zero (64-bit)
0xB100 cbz CBZ <Rn>, <label> Thumb Branch Compare and Branch Zero (Thumb)
0x3A400800 ccmn CCMN <Wn>, #<imm>, #<nzcv>, <cond> Cond Comp Conditional Compare Negative (Immediate)
0xBA400800 ccmn CCMN <Xn>, #<imm>, #<nzcv>, <cond> Cond Comp Conditional Compare Negative (Immediate 64-bit)
0x3A400000 ccmn CCMN <Wn>, <Wm>, #<nzcv>, <cond> Cond Comp Conditional Compare Negative (Register)
0x7A400800 ccmp CCMP <Wn>, #<imm>, #<nzcv>, <cond> Cond Comp Conditional Compare (Immediate)
0x7A400000 ccmp CCMP <Wn>, <Wm>, #<nzcv>, <cond> Cond Comp Conditional Compare (Register)
0x0E000000 cdp CDP<c> <coproc>, <opc1>, <CRd>, <CRn>, <CRm>, <opc2> Coprocessor Coprocessor Data Processing (A32)
0xFE000000 cdp2 CDP2<c> <coproc>, <opc1>, <CRd>, <CRn>, <CRm>, <opc2> Coprocessor Coprocessor Data Processing 2 (A32)
0xD500401F cfinv CFINV System Condition Flag Invert
0xD503251F chkfeat CHK <#imm> System Check
0x1A800400 cinc CINC <Wd>, <Wn>, <cond> Cond Select Conditional Increment
0x5A800000 cinv CINV <Wd>, <Wn>, <cond> Cond Select Conditional Invert
0x0530A000 clasta CLASTA <Rdn>, <Pg>, <Rdn>, <Zm>.<T> SVE Extract SVE Conditional Last Element After
0x0531A000 clastb CLASTB <Rdn>, <Pg>, <Rdn>, <Zm>.<T> SVE Extract SVE Conditional Last Element Before
0xF3BF8F2F clrex CLREX Thumb System Clear Exclusive (Thumb)
0xD503305F clrex CLREX {#<imm>} System Clear Exclusive (System)
0xF57FF01F clrex CLREX<c> System Clear Exclusive (A32)
0x5AC01400 cls CLS <Wd>, <Wn> Data Processing Count Leading Sign Bits
0x5AC01000 clz CLZ <Wd>, <Wn> Data Processing Count Leading Zeros
0xFAB0F080 clz CLZ <Rd>, <Rm> Thumb Misc Count Leading Zeros (Thumb)
0x016F0F10 clz CLZ<c> <Rd>, <Rm> Data Proc Count Leading Zeros (A32)
0x2E204800 clz CLZ <Vd>.<T>, <Vn>.<T> SIMD Two Register Vector Count Leading Zeros
0x2E208C00 cmeq CMEQ <Vd>.<T>, <Vn>.<T>, <Vm>.<T> SIMD Three Register Vector Compare Equal
0x0E203C00 cmge CMGE <Vd>.<T>, <Vn>.<T>, <Vm>.<T> SIMD Three Register Vector Compare Greater Than or Equal
0x0E203400 cmgt CMGT <Vd>.<T>, <Vn>.<T>, <Vm>.<T> SIMD Three Register Vector Compare Greater Than
0x3100001F cmn CMN <Wn>, #<imm> Data Processing Compare Negative (Immediate)
0x01700000 cmn CMN<c> <Rn>, <Rm> {, <shift>} Data Proc Compare Negative (A32)
0xEB100F00 cmn.w CMN.W <Rn>, <Operand2> Thumb2 Data Proc Compare Negative (Wide)
0x7100001F cmp CMP <Wn>, #<imm> Data Processing Compare (Immediate)
0x01500000 cmp CMP<c> <Rn>, <Rm> {, <shift>} Data Proc Compare (A32)
0xEBB00F00 cmp.w CMP.W <Rn>, <Operand2> Thumb2 Data Proc Compare (Wide)
0x2400A000 cmpeq CMPEQ <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T> SVE Compare SVE Compare Equal (Integer)
0x24008010 cmpgt CMPGT <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T> SVE Compare SVE Compare Greater Than (Signed)
0x0E208C00 cmtst CMTST <Vd>.<T>, <Vn>.<T>, <Vm>.<T> SIMD Three Register Vector Compare Test
0x5A800400 cneg CNEG <Wd>, <Wn>, <cond> Cond Select Conditional Negate
0x0E205800 cnt CNT <Vd>.<T>, <Vn>.<T> SIMD Two Register Vector Population Count
0x25208000 cntp CNTP <Xn>, <Pg>, <Pn>.<T> SVE Count SVE Count Active Predicates
0x05218000 compact COMPACT <Zd>.<T>, <Pg>, <Zn>.<T> SVE Permute SVE Compact Vector
0xD50B73C0 cosp COSP <Xt> System Call Out Speculation
0xD50B73E0 cpp CPPP <Xt> System Cache Prefetch Prediction Pruning
0xF1020000 cps CPS<effect> <iflags> {, #<mode>} System Change Processor State
0xF3AF8100 cps CPS<effect> <iflags> {, #<mode>} Thumb System Change Processor State (Thumb)
0x0528A000 cpy CPY <Zd>.<T>, <Pg>/M, <R><n> SVE Move SVE Copy (Predicated)
0x05208000 cpy CPY <Zd>.<T>, <Pg>/M, <Zn>.<T> SVE2 Move Memory Copy (SVE2)
0x01000040 crc32b CRC32B<c> <Rd>, <Rn>, <Rm> Data Proc CRC32 Byte (A32)
0x1AC04000 crc32b CRC32B <Wd>, <Wn>, <Wm> Data Processing CRC32 Byte
0x1AC05000 crc32cb CRC32CB <Wd>, <Wn>, <Wm> Data Processing CRC32C Byte
0x01400040 crc32w CRC32W<c> <Rd>, <Rn>, <Rm> Data Proc CRC32 Word (A32)
0x1AC04800 crc32w CRC32W <Wd>, <Wn>, <Wm> Data Processing CRC32 Word
0x9AC04C00 crc32x CRC32X <Wd>, <Wn>, <Xm> Data Processing CRC32 Doubleword
0x0320F014 csdb CSDB System Hint Consumption of Speculative Data Barrier (A32)
0xD503229F csdb CSDB System Hint Consumption of Speculative Data Barrier
0x1A800000 csel CSEL <Wd>, <Wn>, <Wm>, <cond> Cond Select Conditional Select
0x1A9F07E0 cset CSET <Wd>, <cond> Cond Select Conditional Set
0x1A800400 csinc CSINC <Wd>, <Wn>, <Wm>, <cond> Cond Select Conditional Select Increment
0x5A800000 csinv CSINV <Wd>, <Wn>, <Wm>, <cond> Cond Select Conditional Select Invert
0x5A800400 csneg CSNEG <Wd>, <Wn>, <Wm>, <cond> Cond Select Conditional Select Negate
0x0320F0F0 dbg DBG #<option> System Hint Debug Hint
0xF3AF80F0 dbg DBG #<option> Thumb System Debug Hint (Thumb)
0xD5087000 dc DC <op>, <Xt> System Alias Data Cache Operation
0xF78F8001 dcps1 DCPS1 System Debug Change PE State to EL1 (A32)
0xD4A00001 dcps1 DCPS1 {#<imm>} Exception Debug Change PE State to EL1
0xF78F8002 dcps2 DCPS2 System Debug Change PE State to EL2 (A32)
0xD4A00002 dcps2 DCPS2 {#<imm>} Exception Debug Change PE State to EL2
0xF78F8003 dcps3 DCPS3 System Debug Change PE State to EL3 (A32)
0xD4A00003 dcps3 DCPS3 {#<imm>} Exception Debug Change PE State to EL3
0x0430E400 decb DECB <Xdn>, <pattern> {, MUL #<imm>} SVE Inc/Dec SVE Decrement Scalar by Byte Count
0x04F0E400 decd DECD <Xdn>, <pattern> {, MUL #<imm>} SVE Inc/Dec SVE Decrement Scalar by Doubleword Count
0x04B0E400 decw DECW <Xdn>, <pattern> {, MUL #<imm>} SVE Inc/Dec SVE Decrement Scalar by Word Count
0xF57FF04C dfb DFB System Hint Debug Flush Barrier (A32)
0xD50320DF dgh DGH System Hint Data Gathering Hint