frsqrte

FRSQRTE <Zd>.<T>, <Zn>.<T>

Floating-point Reciprocal Sqrt Estimate.

Pseudocode Operation

No pseudocode available.

Encoding

Binary Layout

01100101

31:24

size

23:22

00111

21:17

001100

15:10

9:5

4:0

Format SVE

Opcode 0x650F3000

Extension SVE

Other forms of frsqrte

frsqrte Vector Floating-Point Reciprocal Sqrt…

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction	ISA	Bit pattern
0x7EF9D800	FRSQRTE <Hd>, <Hn>	A64	01 \| 1 \| 11110 \| 1 \| 111100 \| 11101 \| 10 \| Rn \| Rd
0x7EA1D800	FRSQRTE <V><d>, <V><n>	A64	01 \| 1 \| 111101 \| sz \| 10000 \| 11101 \| 10 \| Rn \| Rd
0x2EF9D800	FRSQRTE <Vd>.<T>, <Vn>.<T>	A64	0 \| Q \| 1 \| 01110 \| 1 \| 111100 \| 11101 \| 10 \| Rn \| Rd
0x2EA1D800	FRSQRTE <Vd>.<T>, <Vn>.<T>	A64	0 \| Q \| 1 \| 011101 \| sz \| 10000 \| 11101 \| 10 \| Rn \| Rd
0x650F3000	FRSQRTE <Zd>.<T>, <Zn>.<T>	A64	01100101 \| size \| 00111 \| 1 \| 001100 \| Zn \| Zd

Description

Find the approximate reciprocal square root of each active floating-point element of the source vector, and place the results in the corresponding elements of the destination vector. This instruction is unpredicated.

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
bits(VL) operand = Z[n, VL];
bits(VL) result;

for e = 0 to elements-1
    bits(esize) element = Elem[operand, e, esize];
    Elem[result, e, esize] = FPRSqrtEstimate(element, FPCR);

Z[d, VL] = result;