frintx
FRINTX <Zd>.<T>, <Pg>/M, <Zn>.<T>
FP Round to Integral (Exact)
Pseudocode Operation
No pseudocode available.
Reference
View in Arm A64 ISA Reference ↗
Arm A64 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x6506A000 | FRINTX <Zd>.<T>, <Pg>/M, <Zn>.<T> | A64 | 01100101 | size | 000 | 11 | 0 | 101 | Pg | Zn | Zd | ||
| 0x2E799800 | FRINTX <Vd>.<T>, <Vn>.<T> | A64 | 0 | Q | 1 | 01110 | 0 | 1111001100 | 1 | 10 | Rn | Rd | ||
| 0x2E219800 | FRINTX <Vd>.<T>, <Vn>.<T> | A64 | 0 | Q | 1 | 01110 | 0 | sz | 100001100 | 1 | 10 | Rn | Rd | ||
| 0x1EE74000 | FRINTX <Hd>, <Hn> | A64 | 0 | 0 | 0 | 11110 | 11 | 1001 | 110 | 10000 | Rn | Rd | ||
| 0x1E274000 | FRINTX <Sd>, <Sn> | A64 | 0 | 0 | 0 | 11110 | 00 | 1001 | 110 | 10000 | Rn | Rd | ||
| 0x1E674000 | FRINTX <Dd>, <Dn> | A64 | 0 | 0 | 0 | 11110 | 01 | 1001 | 110 | 10000 | Rn | Rd |
Description
Round to an integral floating-point value with the specified rounding option from each active floating-point element of the source vector, and place the results in the corresponding elements of the destination vector. Inactive elements in the destination vector register remain unmodified.
Operation
CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
bits(PL) mask = P[g, PL];
bits(VL) operand = if AnyActiveElement(mask, esize) then Z[n, VL] else Zeros(VL);
bits(VL) result = Z[d, VL];
for e = 0 to elements-1
if ActivePredicateElement(mask, e, esize) then
bits(esize) element = Elem[operand, e, esize];
Elem[result, e, esize] = FPRoundInt(element, FPCR, rounding, exact);
Z[d, VL] = result;