st GPU Virtual ISA NVIDIA

Store Memory

st.space.type [a], b;

Store a register value into the specified state space.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding — the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 1.0
Minimum Target sm_10

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations — each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
st.space.type [a], b; b8, b16, b32, b64, s8, s16, s32, s64, u8, u16, u32, u64, f16, f32, f64 global, local, shared, param sm_10 Store to an explicit state space.

Operands

  • a
    Destination address
  • b
    Value to store

At a Glance

Data Types b16, b32, b64, b8, f16, f32, f64, s16, s32, s64, s8, u16, u32, u64, u8
State Spaces global, local, param, shared

Related AMDGPU Concepts

Global-Memory Store ↗
equivalent with restrictions
Shared/Local-Memory Store ↗
equivalent with restrictions
ds_write_b32 (AMDGPU)

Reference

NVIDIA PTX ISA

Semantics

*a = b, in the given state space.

Sources