cvt GPU Virtual ISA NVIDIA

Convert Data Movement

cvt.dtype.atype d, a;

Convert a value between integer and/or floating-point types with an explicit rounding mode.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding — the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 1.0
Minimum Target sm_10

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations — each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
cvt.dtype.atype d, a; s8, s16, s32, s64, u8, u16, u32, u64, f16, f32, f64 sm_10 Type conversion between the source (atype) and destination (dtype) types.
cvt.rn.f32.f64 d, a; f32, f64 rn, rz, rm, rp sm_10 Floating-point narrowing/widening conversion with explicit IEEE rounding mode.

Operands

  • d
    Destination register
  • a
    Source operand

At a Glance

Data Types f16, f32, f64, s16, s32, s64, s8, u16, u32, u64, u8
Modifiers rm, rn, rp, rz

Related AMDGPU Concepts

Type Conversion ↗
equivalent with restrictions
v_cvt_f32_i32 (AMDGPU)

Reference

NVIDIA PTX ISA

Semantics

d = convert(a, atype -> dtype) using the specified rounding mode; saturating forms clamp on overflow.

Sources