multimem.red GPU Virtual ISA NVIDIA
multimem.red Data Movement and Conversion Instructions
// Integer type:
multimem.red{.redsem}{.scope}{.ss}.op.type [a], b;
multimem.red{.redsem}{.scope}{.ss}.op.type [a], b;
The multimem.* operations operate on multimem addresses and accesses all of the multiple memory locations which the multimem address points to. Multimem addresses can be accessed only by multimem.* operations. Accessing a multimem address with ld, st or any other memory operations results in undefined behavior. Refer to CUDA programming guide for creation and management of the multimem addresses.
Encoding
PTX is a virtual instruction set. It has no single, stable native
binary encoding - the compiler lowers this instruction to different native machine
code depending on the selected NVIDIA target architecture (compute capability).
This page intentionally shows no bit-diagram; see the target/version requirements
below for what governs how this instruction compiles.
Syntax Forms
One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.
| Syntax | Data Types | State Space(s) | Modifiers | Min. Target | Description |
|---|---|---|---|---|---|
| // Integer type: multimem.red{.redsem}{.scope}{.ss}.op.type [a], b; | sm_90 | Instruction multimem.ld_reduce performs the following operations: load operation on the multimem address a, which involves loading of data from all of the multiple memory locations pointed to by the m… (see the official PTX ISA docs for the full description) |
Operands
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Integer type:
Operand
At a Glance
Related
Reference
NVIDIA PTX ISA
Description
Instruction multimem.ld_reduce performs the following operations:
load operation on the multimem address a, which involves loading of data from all of the
multiple memory locations pointed to by the multimem address a, reduction operation specified by.op on the multiple data loaded from the multimem address a.
The result of the reduction operation in returned in register d.
Instruction multimem.st performs a store operation of the input operand b to all the memory
locations pointed to by the multimem address a.
Instruction multimem.red performs a reduction operation on all the memory locations pointed to
by the multimem address a, with operand b.
Instruction multimem. (see the official PTX ISA docs for the full description)
Examples
multimem.ld_reduce.and.b32 val1_b32, [addr1];
multimem.ld_reduce.acquire.gpu.global.add.u32 val2_u32, [addr2];
multimem.st.relaxed.gpu.b32 [addr3], val3_b32;
multimem.st.release.cta.global.u32 [addr4], val4_u32;
// (truncated - see the official PTX ISA docs for the full example)Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.
Sources
- Parallel Thread Execution ISA ↗ - NVIDIA Corporation, Chapter 9 - Instruction Set