cvta GPU Virtual ISA NVIDIA

cvta Data Movement and Conversion Instructions

// convert const, global, local, or shared address to generic address
cvta.space.size p, a; // source address in register a

Convert a const, Kernel Function Parameters (.param ), global, local, or shared address to a generic address, or vice-versa.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 2.0
Minimum Target sm_20

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
// convert const, global, local, or shared address to generic address cvta.space.size p, a; // source address in register a sm_20 Convert a const, Kernel Function Parameters (.param ), global, local, or shared address to a generic address, or vice-versa. The source and destination addresses must be the same size. (see the official PTX ISA docs for the full description)

Operands

At a Glance

Data Types -

Related

More in Data Movement and Conversion Instructions

Reference

NVIDIA PTX ISA

Description

Convert a const, Kernel Function Parameters (.param ), global, local, or shared address to a generic address, or vice-versa. The source and destination addresses must be the same size. Use cvt.u32.u64 or cvt.u64.u32 to truncate or zero-extend addresses. For variables declared in.const, Kernel Function Parameters (.param ),.global,.local, or.shared state space, the generic address of the variable may be taken using cvta. (see the official PTX ISA docs for the full description)

Examples

cvta.const.u32   ptr,cvar;
cvta.local.u32   ptr,lptr;
cvta.shared::cta.u32  p,As+4;
cvta.shared::cluster.u32 ptr, As;
cvta.to.global.u32  p,gptr;
cvta.param.u64   ptr,pvar;
// (truncated - see the official PTX ISA docs for the full example)

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources