cp.async.bulk.prefetch.tensor GPU Virtual ISA NVIDIA
cp.async.bulk.prefetch.tensor Data Movement and Conversion Instructions
// global -> L2:
cp.async.bulk.prefetch.tensor.dim.L2.src{.load_mode}{.level::cache_hint} [tensorMap, tensorCoords]
{, im2colInfo } {, cache_policy}
cp.async.bulk.prefetch.tensor.dim.L2.src{.load_mode}{.level::cache_hint} [tensorMap, tensorCoords]
{, im2colInfo } {, cache_policy}
cp.async.bulk.prefetch.tensor is a non-blocking instruction which may initiate an asynchronous prefetch of tensor data from the location in.src statespace to the L2 cache.
Encoding
PTX is a virtual instruction set. It has no single, stable native
binary encoding - the compiler lowers this instruction to different native machine
code depending on the selected NVIDIA target architecture (compute capability).
This page intentionally shows no bit-diagram; see the target/version requirements
below for what governs how this instruction compiles.
Syntax Forms
One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.
| Syntax | Data Types | State Space(s) | Modifiers | Min. Target | Description |
|---|---|---|---|---|---|
| // global -> L2: cp.async.bulk.prefetch.tensor.dim.L2.src{.load_mode}{.level::cache_hint} [tensorMap, tensorCoords] {, im2colInfo } {, cache_policy} | sm_90 | cp.async.bulk.prefetch.tensor is a non-blocking instruction which may initiate an asynchronous prefetch of tensor data from the location in.src statespace to the L2 cache. (see the official PTX ISA docs for the full description) |
Operands
-
global -> L2:
Operand
At a Glance
Related
Reference
NVIDIA PTX ISA
Description
cp.async.bulk.prefetch.tensor is a non-blocking instruction which may initiate an asynchronous
prefetch of tensor data from the location in.src statespace to the L2 cache.
The operand tensorMap is the generic address of the opaque tensor-map object which resides
in.param space or.const space or.global space. The operand tensorMap specifies
the properties of the tensor copy operation, as described in Tensor-map.
The tensorMap is accessed in tensormap proxy. (see the official PTX ISA docs for the full description)
Examples
.reg .b16 ctaMask, im2colwHalo, im2colOff;
.reg .u16 i2cOffW, i2cOffH, i2cOffD;
.reg .b64 l2CachePolicy;
cp.async.bulk.prefetch.tensor.1d.L2.global.tile [tensorMap0, {tc0}];
// (truncated - see the official PTX ISA docs for the full example)Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.
Sources
-
Parallel Thread Execution ISA ↗
- NVIDIA Corporation, Chapter 9 - Instruction Set
Deep-linked directly to this instruction's section.