prmt GPU Virtual ISA NVIDIA

prmt Data Movement and Conversion Instructions

prmt.b32{.mode} d, a, b, c;

Pick four arbitrary bytes from two 32-bit registers, and reassemble them into a 32-bit destination register.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 2.0
Minimum Target sm_20

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
prmt.b32{.mode} d, a, b, c; sm_20 Pick four arbitrary bytes from two 32-bit registers, and reassemble them into a 32-bit destination register. (see the official PTX ISA docs for the full description)

Operands

  • d
    Destination register
  • a
    Source operand
  • b
    Source operand
  • c
    Source operand

At a Glance

Data Types -

Related AMDGPU Concepts

Byte Permute ↗
equivalent with restrictions
v_perm_b32 (AMDGPU)

Related

More in Data Movement and Conversion Instructions

Reference

NVIDIA PTX ISA

Description

Pick four arbitrary bytes from two 32-bit registers, and reassemble them into a 32-bit destination register. In the generic form (no mode specified), the permute control consists of four 4-bit selection values. The bytes in the two source registers are numbered from 0 to 7: {b, a} = {{b7, b6, b5, b4}, {b3, b2, b1, b0}}. For each byte in the target register, a 4-bit selection value is defined. The 3 lsbs of the selection value specify which of the 8 source bytes should be moved into the target position. (see the official PTX ISA docs for the full description)

Semantics

tmp64 = (b<<32) | a; // create 8 byte source if ( ! mode ) { ctl[0] = (c >> 0) & 0xf; ctl[1] = (c >> 4) & 0xf; ctl[2] = (c >> 8) & 0xf; ctl[3] = (c >> 12) & 0xf; } else { ctl[0] = ctl[1] = ctl[2] = ctl[3] = (c >> 0) & 0x3; } tmp[07:00] = ReadByte( mode, ctl[0], tmp64 ); tmp[15:08] = ReadByte( mode, ctl[1], tmp64 ); tmp[23:16] = ReadByte( mode, ctl[2], tmp64 ); tmp[31:24] = ReadByte( mode, ctl[3], tmp64 );

Examples

prmt.b32      r1, r2, r3, r4;
prmt.b32.f4e  r1, r2, r3, r4;

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources