spcompress GPU Virtual ISA NVIDIA

Data Movement and Conversion Instructions

spcompress.elemsize.idxsize.spfactor.num mdata, cdata, data, spdesc;

The spcompress instruction copies elements from a dense vector data to form the structured sparse compressed vector cdata.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 9.4
Minimum Target sm_107a

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
spcompress.elemsize.idxsize.spfactor.num mdata, cdata, data, spdesc; sm_107a The spcompress instruction copies elements from a dense vector data to form the structured sparse compressed vector cdata. The resulting metadata is written to the vector operand mdata. (see the official PTX ISA docs for the full description)

Operands

  • mdata
    Operand
  • cdata
    Operand
  • data
    Operand
  • spdesc
    Operand

At a Glance

Data Types -

Related

More in Data Movement and Conversion Instructions

Reference

NVIDIA PTX ISA

Description

The spcompress instruction copies elements from a dense vector data to form the structured sparse compressed vector cdata. The resulting metadata is written to the vector operand mdata. The compression factor is specified using qualifier .spfactor. The only allowed value for .spfactor is .sp::2:4 resulting in 2:4 compression for a dense input vector. In this case, 2 elements per 4 group of elements from data would be selected and copied into cdata. The output vector mdata stores the indices for the chosen 2 elements per group of 4 elements. The criterion for selection of these elements is specified by a field from sparsity descriptor spdesc. (see the official PTX ISA docs for the full description)

Examples

.reg .b32 mdata_<2>, cdata_<4>, data_<8>, spdesc;
mov.b32 spdesc, 0x5; // MAXABS op, .s8 datatype
spcompress.b8.b2.sp::2:4.x4 {mdata_0},
   {cdata_0, cdata_1, cdata_2, cdata_3},
   {data_0, data_1, data_2, data_3, data_4, data_5, data_6, data_7},
   spdesc;

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources