st.bulk GPU Virtual ISA NVIDIA

st.bulk Data Movement and Conversion Instructions

st.bulk{.weak}{.shared::cta} [a], size, initval; // initval must be zero

st.bulk instruction initializes a region of shared memory starting from the location specified by destination address operand a.

Encoding

PTX is a virtual instruction set. It has no single, stable native binary encoding - the compiler lowers this instruction to different native machine code depending on the selected NVIDIA target architecture (compute capability). This page intentionally shows no bit-diagram; see the target/version requirements below for what governs how this instruction compiles.
PTX ISA Version Introduced PTX ISA 8.6
Minimum Target sm_100

Syntax Forms

One mnemonic covers many type / state-space / scope / modifier combinations - each row below is an independently valid form.

Syntax Data Types State Space(s) Modifiers Min. Target Description
st.bulk{.weak}{.shared::cta} [a], size, initval; // initval must be zero sm_100 st.bulk instruction initializes a region of shared memory starting from the location specified by destination address operand a. (see the official PTX ISA docs for the full description)

Operands

At a Glance

Data Types -

Related

More in Data Movement and Conversion Instructions

Reference

NVIDIA PTX ISA

Description

st.bulk instruction initializes a region of shared memory starting from the location specified by destination address operand a. The 32-bit or 64-bit integer operand size specifies the amount of memory to be initialized in terms of number of bytes. size must be a multiple of 8. If the value is not a multiple of 8, then the behavior is undefined. The maximum value of size operand can be 16777216. The integer immediate operand initval specifies the initialization value for the memory locations. The only numeric value allowed for operand initval is 0. If no state space is specified then Generic Addressing is used. (see the official PTX ISA docs for the full description)

Examples

st.bulk.weak.shared::cta  [dst], n, 0;

st.bulk                   [gdst], 4096, 0;

Reproduced from NVIDIA's official PTX ISA documentation for technical accuracy.

Sources