scratch_load_dword GPU Native ISA AMD Vector
SCRATCH LOAD DWORD Scratch Memory
scratch_load_dword
Load 32 bits of data from the scratch aperture into a vector register.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (SCRATCH)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related
More in Scratch Memory
Reference
AMDGPU / GFX ISA
Example
scratch_load_dword v5, v1, s2A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite (gfx11). Not from an AMD document, and not authored here.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
- AMD Machine-Readable GPU ISA Specification ↗ - Advanced Micro Devices, Inc.
- LLVM MC assembler tests for AMDGPU (gfx11) ↗ - LLVM Project