scratch_store_short GPU Native ISA AMD Vector
SCRATCH STORE SHORT Scratch Memory
scratch_store_short
Store 16 bits of data from a vector register into the scratch aperture.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (SCRATCH)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
Per-target GFX compatibility has not yet been verified for this instruction.
Related
More in Scratch Memory
Reference
AMDGPU / GFX ISA
Semantics
addr = CalcScratchAddr(ADDR.b32, SADDR.b32, OFFSET.b32);
MEM[addr].b16 = VDATA[15 : 0]
Example
scratch_store_short v1, v2, s3A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite (gfx11). Not from an AMD document, and not authored here.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
-
"AMD Instinct MI300" Instruction Set Architecture: Reference Guide ↗
- Advanced Micro Devices, Inc.
Reference Guide, page 499. - LLVM MC assembler tests for AMDGPU (gfx11) ↗ - LLVM Project