sm4ekey
SM4EKEY <Vd>.4S, <Vn>.4S, <Vm>.4S
SM4 Key Generation.
Pseudocode Operation
No pseudocode available.
Reference
View in Arm A64 ISA Reference ↗
Arm A64 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xCE60C800 | SM4EKEY <Vd>.4S, <Vn>.4S, <Vm>.4S | A64 | 11001110011 | Rm | 1 | 1 | 00 | 10 | Rn | Rd | ||
| 0x4520F000 | SM4EKEY <Zd>.S, <Zn>.S, <Zm>.S | A64 | 01000101 | 0 | 0 | 1 | Zm | 11110 | 0 | Zn | Zd |
Description
SM4 Key takes an input as a 128-bit vector from the first source SIMD&FP register and a 128-bit constant from the second SIMD&FP register. It derives four iterations of the output key, in accordance with the SM4 standard, returning the 128-bit result to the destination SIMD&FP register. This instruction is implemented only when FEAT_SM4 is implemented.
Operation
AArch64.CheckFPAdvSIMDEnabled();
bits(128) Vm = V[m, 128];
bits(32) intval;
bits(32) const;
bits(128) roundresult;
roundresult = V[n, 128];
for index = 0 to 3
const = Elem[Vm, index, 32];
intval = roundresult<127:96> EOR roundresult<95:64> EOR roundresult<63:32> EOR const;
for i = 0 to 3
Elem[intval, i, 8] = Sbox(Elem[intval, i, 8]);
intval = intval EOR ROL(intval, 13) EOR ROL(intval, 23);
intval = intval EOR roundresult<31:0>;
roundresult<31:0> = roundresult<63:32>;
roundresult<63:32> = roundresult<95:64>;
roundresult<95:64> = roundresult<127:96>;
roundresult<127:96> = intval;
V[d, 128] = roundresult;