x86 Opcode Map
Reverse lookup instructions by their hexadecimal encoding.
| Opcode | Mnemonic | Syntax | Format | Name |
|---|---|---|---|---|
| 66 0F 2F | comisd | COMISD xmm1, xmm2/m64 | SSE2 | Compare Scalar Ordered Double-Precision |
| NP 0F 2F /r | comiss | COMISS xmm1, xmm2/m32 | SSE | Compare Scalar Ordered Single-Precision |
| 0F A2 | cpuid | CPUID | Legacy | CPU Identification |
| REX.W + 99 | cqto | CQTO | Legacy | Convert Quadword to Octoword |
| F2 0F 38 F1 | crc32 | CRC32 r32, r/m | SSE4.2 | Accumulate CRC32 Value |
| F3 0F E6 | cvtdq2pd | CVTDQ2PD xmm1, xmm2/m64 | SSE2 | Convert Packed Doubleword to Packed Double-Precision |
| NP 0F 5B /r | cvtdq2ps | CVTDQ2PS xmm1, xmm2/m128 | SSE2 | Convert Packed Doubleword Integers to Packed Single-Precision |
| F2 0F E6 | cvtpd2dq | CVTPD2DQ xmm1, xmm2/m128 | SSE2 | Convert Packed Double-Precision to Packed Doubleword |
| 66 0F 5A | cvtpd2ps | CVTPD2PS xmm1, xmm2/m128 | SSE2 | Convert Packed Double to Packed Single |
| 66 0F 5B | cvtps2dq | CVTPS2DQ xmm1, xmm2/m128 | SSE2 | Convert Packed Single-Precision to Packed Doubleword Integers |
| NP 0F 5A /r | cvtps2pd | CVTPS2PD xmm1, xmm2/m64 | SSE2 | Convert Packed Single to Packed Double |
| F2 0F 2D | cvtsd2si | CVTSD2SI r32, xmm/m64 | SSE2 | Convert Scalar Double to Integer |
| F2 REX.W 0F 2D /r | cvtsd2sq | CVTSD2SQ r64, xmm/m64 | SSE2 | Convert Scalar Double-Precision to Signed Quadword Integer |
| F2 0F 5A | cvtsd2ss | CVTSD2SS xmm, xmm/m64 | SSE2 | Convert Scalar Double to Scalar Single |
| F2 0F 2A | cvtsi2sd | CVTSI2SD xmm, r/m32 | SSE2 | Convert Doubleword Integer to Scalar Double-Precision |
| F3 0F 2A | cvtsi2ss | CVTSI2SS xmm, r/m32 | SSE | Convert Doubleword Integer to Scalar Single-Precision |
| F2 REX.W 0F 2A /r | cvtsq2sd | CVTSQ2SD xmm1, r/m64 | SSE2 | Convert Signed Quadword Integer to Scalar Double-Precision |
| F3 REX.W 0F 2A /r | cvtsq2ss | CVTSQ2SS xmm1, r/m64 | SSE | Convert Signed Quadword Integer to Scalar Single-Precision |
| F3 0F 5A | cvtss2sd | CVTSS2SD xmm, xmm/m32 | SSE2 | Convert Scalar Single to Scalar Double |
| F3 0F 2D | cvtss2si | CVTSS2SI r32, xmm/m32 | SSE | Convert Scalar Single to Integer |
| F3 REX.W 0F 2D /r | cvtss2sq | CVTSS2SQ r64, xmm/m32 | SSE | Convert Scalar Single-Precision to Signed Quadword Integer |
| 66 0F E6 | cvttpd2dq | CVTTPD2DQ xmm1, xmm2/m128 | SSE2 | Convert with Truncation Packed Double to Packed Doubleword |
| F3 0F 5B | cvttps2dq | CVTTPS2DQ xmm1, xmm2/m128 | SSE2 | Convert with Truncation Packed Single-Precision to Packed Doubleword Integers |
| NP 0F 2C /r | cvttps2pi | CVTTPS2PI mm, xmm/m64 | SSE | Convert with Truncation Packed Single to Packed Integer (MMX) |
| F2 0F 2C | cvttsd2si | CVTTSD2SI r32, xmm/m64 | SSE2 | Convert with Truncation Scalar Double to Integer |
| F2 REX.W 0F 2C /r | cvttsd2sq | CVTTSD2SQ r64, xmm/m64 | SSE2 | Convert with Truncation Scalar Double-Precision to Signed Quadword Integer |
| F3 0F 2C | cvttss2si | CVTTSS2SI r32, xmm/m32 | SSE | Convert with Truncation Scalar Single to Integer |
| F3 REX.W 0F 2C /r | cvttss2sq | CVTTSS2SQ r64, xmm/m32 | SSE | Convert with Truncation Scalar Single-Precision to Signed Quadword Integer |
| 99 | cwd | CWD | Legacy | Convert Word to Doubleword |
| 98 | cwtl | CWTL | Legacy | Convert Word to Long |
| 27 | daa | DAA | Legacy | Decimal Adjust After Addition |
| 2F | das | DAS | Legacy | Decimal Adjust After Subtraction |
| FF /1 | dec | DEC r/m | Legacy | Decrement |
| F7 /6 | div | DIV r/m | Legacy | Unsigned Divide |
| 66 0F 5E | divpd | DIVPD xmm, xmm/m128 | SSE2 | Divide Packed Double-Precision |
| NP 0F 5E /r | divps | DIVPS xmm, xmm/m128 | SSE | Divide Packed Single-Precision |
| F2 0F 5E | divsd | DIVSD xmm1, xmm2/m64 | SSE2 | Divide Scalar Double-Precision |
| F3 0F 5E | divss | DIVSS xmm1, xmm2/m32 | SSE | Divide Scalar Single-Precision |
| 66 0F 3A 41 | dppd | DPPD xmm1, xmm2/m128, imm8 | SSE4.1 | Dot Product Packed Double-Precision |
| 66 0F 3A 40 | dpps | DPPS xmm1, xmm2/m128, imm8 | SSE4.1 | Dot Product Packed Single-Precision |
| NP 0F 77 | emms | EMMS | MMX | Empty MMX Technology State |
| NP 0F 01 CF | encls | ENCLS | Legacy | Execute Enclave Supervisor Leaf |
| NP 0F 01 D7 | enclu | ENCLU | Legacy | Execute Enclave User Leaf |
| F3 0F 38 FA | encodekey128 | ENCODEKEY128 r32, r32 | Legacy | Encode 128-bit Key |
| F3 0F 38 FB | encodekey256 | ENCODEKEY256 r32, r32 | Legacy | Encode 256-bit Key |
| F3 0F 1E FB | endbr32 | ENDBR32 | Legacy | End Branch 32-bit |
| F3 0F 1E FA | endbr64 | ENDBR64 | Legacy | End Branch 64-bit |
| F2 0F 38 F8 | enqcmd | ENQCMD r32, m512 | Legacy | Enqueue Command |
| F3 0F 38 F8 | enqcmds | ENQCMDS r32, m512 | Legacy | Enqueue Command Supervisor |
| C8 | enter | ENTER imm16, imm8 | Legacy | Make Stack Frame |
| F2 0F 01 CA | erets | ERETS | Legacy | Event Return Supervisor |
| F3 0F 01 CA | eretu | ERETU | Legacy | Event Return User |
| 66 0F 3A 17 | extractps | EXTRACTPS r32/m32, xmm1, imm8 | SSE4.1 | Extract Packed Single-Precision |
| 66 0F 79 /r | extrq | EXTRQ xmm1, xmm2 | SSE4a | Extract Field from Register |
| D9 F0 | f2xm1 | F2XM1 | Legacy | Compute 2^x - 1 |
| D9 E1 | fabs | FABS | Legacy | Absolute Value |
| D8 /0 | fadd | FADD m32fp/m64fp | Legacy | Add Floating Point |
| D9 E0 | fchs | FCHS | Legacy | Change Sign |
| 9B DB E2 | fclex | FCLEX | Legacy | Clear Exceptions |
| DA C0+i | fcmovb | FCMOVB ST(0), ST(i) | Legacy | Floating-Point Conditional Move If Below |
| DA D0+i | fcmovbe | FCMOVBE ST(0), ST(i) | Legacy | Floating-Point Conditional Move If Below or Equal |
| DA C8+i | fcmove | FCMOVE ST(0), ST(i) | Legacy | Floating-Point Conditional Move If Equal |
| DB C0+i | fcmovnb | FCMOVNB ST(0), ST(i) | Legacy | Floating-Point Conditional Move If Not Below |
| DB D0+i | fcmovnbe | FCMOVNBE ST(0), ST(i) | Legacy | Floating-Point Conditional Move If Not Below or Equal |
| DB C8+i | fcmovne | FCMOVNE ST(0), ST(i) | Legacy | Floating-Point Conditional Move If Not Equal |
| DB D8+i | fcmovnu | FCMOVNU ST(0), ST(i) | Legacy | Floating-Point Conditional Move If Not Unordered |
| DA D8+i | fcmovu | FCMOVU ST(0), ST(i) | Legacy | Floating-Point Conditional Move If Unordered |
| D8 /2 | fcom | FCOM m32fp/m64fp | Legacy | Compare Real |
| DB F0+i | fcomi | FCOMI ST(0), ST(i) | Legacy | Compare Real and Set EFLAGS |
| D9 FF | fcos | FCOS | Legacy | Cosine |
| D9 F6 | fdecstp | FDECSTP | Legacy | Decrement Stack-Top Pointer |
| D8 /6 | fdiv | FDIV m32fp/m64fp | Legacy | Divide Floating Point |
| DD C0+i | ffree | FFREE ST(i) | Legacy | Free Floating-Point Register |
| DF /0 | fild | FILD m16int/m32int/m64int | Legacy | Load Integer |
| D9 F7 | fincstp | FINCSTP | Legacy | Increment Stack-Top Pointer |
| 9B DB E3 | finit | FINIT | Legacy | Initialize FPU |
| DF /2 | fist | FIST m16int/m32int | Legacy | Store Integer |
| DF /3 | fistp | FISTP m16int/m32int/m64int | Legacy | Store Integer and Pop |
| D9 /0 | fld | FLD m32fp/m64fp/m80fp | Legacy | Load Floating Point Value |
| D9 E8 | fld1 | FLD1 | Legacy | Load Constant 1.0 |
| D9 /5 | fldcw | FLDCW m2byte | Legacy | Load Control Word |
| D9 EA | fldl2e | FLDL2E | Legacy | Load Constant log2(e) |
| D9 E9 | fldl2t | FLDL2T | Legacy | Load Constant log2(10) |
| D9 EC | fldlg2 | FLDLG2 | Legacy | Load Constant log10(2) |
| D9 ED | fldln2 | FLDLN2 | Legacy | Load Constant ln(2) |
| D9 EB | fldpi | FLDPI | Legacy | Load Constant Pi |
| D9 EE | fldz | FLDZ | Legacy | Load Constant +0.0 |
| D8 /1 | fmul | FMUL m32fp/m64fp | Legacy | Multiply Floating Point |
| D9 F3 | fpatan | FPATAN | Legacy | Partial Arctangent |
| D9 F8 | fprem | FPREM | Legacy | Partial Remainder |
| D9 F2 | fptan | FPTAN | Legacy | Partial Tangent |
| D9 FC | frndint | FRNDINT | Legacy | Round to Integer |
| DD /4 | frstor | FRSTOR m108byte | Legacy | Restore FPU State |
| 9B DD /6 | fsave | FSAVE m108byte | Legacy | Save FPU State |
| D9 FD | fscale | FSCALE | Legacy | Scale |
| D9 FE | fsin | FSIN | Legacy | Sine |
| D9 FB | fsincos | FSINCOS | Legacy | Sine and Cosine |
| D9 FA | fsqrt | FSQRT | Legacy | Square Root |
| D9 /2 | fst | FST m32fp/m64fp | Legacy | Store Floating Point Value |
| 9B D9 /7 | fstcw | FSTCW m2byte | Legacy | Store Control Word |