RISC-V Opcode Map
Reverse lookup instructions by their hexadecimal encoding.
| Opcode | Mnemonic | Syntax | Format | Name |
|---|---|---|---|---|
| 0x00005007 | VLE16.V | VLE16.V vd, (rs1), vm | VL-Type | Vector Load Element (16-bit) |
| 0x01005007 | VLE16FF.V | VLE16FF.V vd, (rs1), vm | VL-Type | Vector Load 16-bit Fault-Only-First |
| 0x00006007 | VLE32.V | VLE32.V vd, (rs1), vm | V-Load | Vector Load Element (32-bit) |
| 0x01006007 | VLE32FF.V | VLE32FF.V vd, (rs1), vm | VL-Type | Vector Load 32-bit Fault-Only-First |
| 0x00007007 | VLE64.V | VLE64.V vd, (rs1), vm | VL-Type | Vector Load Element (64-bit) |
| 0x01007007 | VLE64FF.V | VLE64FF.V vd, (rs1), vm | VL-Type | Vector Load 64-bit Fault-Only-First |
| 0x00000007 | VLE8.V | VLE8.V vd, (rs1), vm | VL-Type | Vector Load Element (8-bit) |
| 0x01000007 | VLE8FF.V | VLE8FF.V vd, (rs1), vm | VL-Type | Vector Load 8-bit Fault-Only-First |
| 0x02B00007 | VLM.V | VLM.V vd, (rs1) | VL-Type | Vector Load Mask |
| 0x0C006007 | VLOXEI32.V | VLOXEI32.V vd, (rs1), vs2, vm | VL-Type | Vector Load Ordered Indexed (32-bit indices) |
| 0x08006007 | VLSE32.V | VLSE32.V vd, (rs1), rs2, vm | VL-Type | Vector Load Strided Element (32-bit) |
| 0x20005007 | VLSEG2E16.V | VLSEG2E16.V vd, (rs1), vm | VL-Type | Vector Load Segment (2 fields, 16-bit) |
| 0x40000007 | VLSEG3E8.V | VLSEG3E8.V vd, (rs1), vm | VL-Type | Vector Load Segment (3 fields, 8-bit) |
| 0x60000007 | VLSEG4E8.V | VLSEG4E8.V vd, (rs1), vm | VL-Type | Vector Load Segment (4 fields, 8-bit) |
| 0x04006007 | VLUXEI32.V | VLUXEI32.V vd, (rs1), vs2, vm | VL-Type | Vector Load Unordered Indexed (32-bit indices) |
| 0xB4002057 | VMACC.VV | VMACC.VV vd, vs1, vs2, vm | OPIVV | Vector Integer Multiply-Accumulate |
| 0x44003057 | VMADC.VIM | VMADC.VIM vd, vs2, imm, v0 | OPIVI | Vector Mask Add with Carry Immediate |
| 0x44000057 | VMADC.VVM | VMADC.VVM vd, vs2, vs1, v0 | OPIVV | Vector Add with Carry (Produce Mask) |
| 0x66002057 | VMAND.MM | VMAND.MM vd, vs2, vs1 | OPMVV | Vector Mask AND |
| 0x62002057 | VMANDN.MM | VMANDN.MM vd, vs2, vs1 | OPMVV | Vector Mask AND NOT |
| 0x1C000057 | VMAX.VV | VMAX.VV vd, vs2, vs1, vm | OPIVV | Vector Maximum (Signed) |
| 0x18000057 | VMAXU.VV | VMAXU.VV vd, vs2, vs1, vm | OPIVV | Vector Maximum (Unsigned) |
| 0x5C003057 | VMERGE.VIM | VMERGE.VIM vd, vs2, imm, v0 | OPIVI | Vector Merge Immediate |
| 0x5C000057 | VMERGE.VVM | VMERGE.VVM vd, vs2, vs1, v0 | OPIVV | Vector Merge |
| 0x5C004057 | VMERGE.VXM | VMERGE.VXM vd, vs2, rs1, v0 | OPIVX | Vector Merge Scalar |
| 0x60001057 | VMFEQ.VV | VMFEQ.VV vd, vs2, vs1, vm | OPFVV | Vector Float Equal |
| 0x64001057 | VMFLE.VV | VMFLE.VV vd, vs2, vs1, vm | OPFVV | Vector Float Less or Equal |
| 0x6C001057 | VMFLT.VV | VMFLT.VV vd, vs2, vs1, vm | OPFVV | Vector Float Less Than |
| 0x14000057 | VMIN.VV | VMIN.VV vd, vs2, vs1, vm | OPIVV | Vector Minimum (Signed) |
| 0x10000057 | VMINU.VV | VMINU.VV vd, vs2, vs1, vm | OPIVV | Vector Minimum (Unsigned) |
| 0x76002057 | VMNAND.MM | VMNAND.MM vd, vs2, vs1 | OPMVV | Vector Mask NAND |
| 0x72002057 | VMORN.MM | VMORN.MM vd, vs2, vs1 | OPMVV | Vector Mask OR NOT |
| 0x4E000057 | VMSBC.VV | VMSBC.VV vd, vs2, vs1 | OPMVV | Vector Mask Set Before First |
| 0x5000A057 | VMSBF.M | VMSBF.M vd, vs2, vm | OPMVV | Vector Mask Set Before First |
| 0x60003057 | VMSEQ.VI | VMSEQ.VI vd, vs2, imm, vm | OPIVI | Vector Mask Set Equal Immediate |
| 0x60000057 | VMSEQ.VV | VMSEQ.VV vd, vs2, vs1, vm | OPIVV | Vector Mask Set Equal |
| 0x74000057 | VMSGE.VV | VMSGE.VV vd, vs2, vs1, vm | OPIVV | Vector Mask Set Greater or Equal (Signed) |
| 0x70000057 | VMSGEU.VV | VMSGEU.VV vd, vs2, vs1, vm | OPIVV | Vector Mask Set Greater or Equal (Unsigned) |
| 0x6C000057 | VMSGT.VV | VMSGT.VV vd, vs2, vs1, vm | OPIVV | Vector Mask Set Greater Than (Signed) |
| 0x68000057 | VMSGTU.VV | VMSGTU.VV vd, vs2, vs1, vm | OPIVV | Vector Mask Set Greater Than (Unsigned) |
| 0x5001A057 | VMSIF.M | VMSIF.M vd, vs2, vm | OPMVV | Vector Mask Set Including First |
| 0x74003057 | VMSLE.VI | VMSLE.VI vd, vs2, imm, vm | OPIVI | Vector Mask Set Less or Equal Immediate |
| 0x74000057 | VMSLE.VV | VMSLE.VV vd, vs2, vs1, vm | OPIVV | Vector Mask Set Less or Equal (Signed) |
| 0x70003057 | VMSLEU.VI | VMSLEU.VI vd, vs2, imm, vm | OPIVI | Vector Mask Set Less or Equal Unsigned Immediate |
| 0x70000057 | VMSLEU.VV | VMSLEU.VV vd, vs2, vs1, vm | OPIVV | Vector Mask Set Less or Equal (Unsigned) |
| 0x74003057 | VMSLT.VI | VMSLT.VI vd, vs2, imm, vm | OPIVI | Vector Mask Set Less Than Immediate |
| 0x6C000057 | VMSLT.VV | VMSLT.VV vd, vs2, vs1, vm | OPIVV | Vector Mask Set Less Than (Signed) |
| 0x70003057 | VMSLTU.VI | VMSLTU.VI vd, vs2, imm, vm | OPIVI | Vector Mask Set Less Than Unsigned Immediate |
| 0x68000057 | VMSLTU.VV | VMSLTU.VV vd, vs2, vs1, vm | OPIVV | Vector Mask Set Less Than (Unsigned) |
| 0x64003057 | VMSNE.VI | VMSNE.VI vd, vs2, imm, vm | OPIVI | Vector Mask Set Not Equal Immediate |
| 0x50012057 | VMSOF.M | VMSOF.M vd, vs2, vm | OPMVV | Vector Mask Set Only First |
| 0x94002057 | VMUL.VV | VMUL.VV vd, vs2, vs1, vm | OPIVV | Vector Integer Multiply |
| 0x9C002057 | VMULH.VV | VMULH.VV vd, vs2, vs1, vm | OPIVV | Vector Multiply High Signed |
| 0x90002057 | VMULHU.VV | VMULHU.VV vd, vs2, vs1, vm | OPIVV | Vector Multiply High Unsigned |
| 0x42006057 | VMV.S.X | VMV.S.X vd, rs1 | OPMVX | Vector Move Integer to Scalar |
| 0x5E000057 | VMV.V.V | VMV.V.V vd, vs1 | OPIVV | Vector Move |
| 0x42002057 | VMV.X.S | VMV.X.S rd, vs2 | OPMVX | Vector Move Scalar to Integer |
| 0x9E003057 | VMV1R.V | VMV1R.V vd, vs2 | OPVI | Vector Move 1 Register (Whole) |
| 0x9E00B057 | VMV2R.V | VMV2R.V vd, vs2 | OPVI | Vector Move 2 Registers (Whole) |
| 0x9E01B057 | VMV4R.V | VMV4R.V vd, vs2 | OPVI | Vector Move 4 Registers (Whole) |
| 0x9E03B057 | VMV8R.V | VMV8R.V vd, vs2 | OPVI | Vector Move 8 Registers (Whole) |
| 0x7E002057 | VMXNOR.MM | VMXNOR.MM vd, vs2, vs1 | OPMVV | Vector Mask XNOR |
| 0xBC000057 | VNCLIP.WV | VNCLIP.WV vd, vs2, vs1, vm | OPIVV | Vector Narrowing Clip (Arithmetic Shift) |
| 0xB8003057 | VNCLIPU.WI | VNCLIPU.WI vd, vs2, imm, vm | OPIVI | Vector Narrowing Clip Unsigned (Immediate) |
| 0xAC002057 | VNMSUB.VV | VNMSUB.VV vd, vs1, vs2, vm | OPIVV | Vector Integer Negative Multiply-Subtract |
| 0xB4003057 | VNSRA.WI | VNSRA.WI vd, vs2, imm, vm | OPIVI | Vector Narrowing Shift Right Arithmetic Immediate |
| 0xB4004057 | VNSRA.WX | VNSRA.WX vd, vs2, rs1, vm | OPIVX | Vector Narrowing Shift Right Arithmetic |
| 0xB0003057 | VNSRL.WI | VNSRL.WI vd, vs2, imm, vm | OPIVI | Vector Narrowing Shift Right Logical Immediate |
| 0xB0004057 | VNSRL.WX | VNSRL.WX vd, vs2, rs1, vm | OPIVX | Vector Narrowing Shift Right Logical |
| 0x28003057 | VOR.VI | VOR.VI vd, vs2, imm, vm | OPIVI | Vector OR Immediate |
| 0x28000057 | VOR.VV | VOR.VV vd, vs2, vs1, vm | OPIVV | Vector Bitwise OR |
| 0x04002057 | VREDAND.VS | VREDAND.VS vd, vs2, vs1, vm | OPMVV | Vector Reduction AND |
| 0x1C002057 | VREDMAX.VS | VREDMAX.VS vd, vs2, vs1, vm | OPMVV | Vector Reduction Maximum (Signed) |
| 0x14002057 | VREDMIN.VS | VREDMIN.VS vd, vs2, vs1, vm | OPMVV | Vector Reduction Minimum (Signed) |
| 0x08002057 | VREDOR.VS | VREDOR.VS vd, vs2, vs1, vm | OPMVV | Vector Reduction OR |
| 0x00002057 | VREDSUM.VS | VREDSUM.VS vd, vs2, vs1, vm | OPMVV | Vector Reduction Sum |
| 0x8C002057 | VREM.VV | VREM.VV vd, vs2, vs1, vm | OPIVV | Vector Remainder Signed |
| 0x88002057 | VREMU.VV | VREMU.VV vd, vs2, vs1, vm | OPIVV | Vector Remainder Unsigned |
| 0x4804A057 | VREV8.V | VREV8.V vd, vs2, vm | OPIVV | Vector Reverse 8 |
| 0x30003057 | VRGATHER.VI | VRGATHER.VI vd, vs2, imm, vm | OPIVI | Vector Register Gather Immediate |
| 0x30000057 | VRGATHER.VV | VRGATHER.VV vd, vs2, vs1, vm | OPIVV | Vector Register Gather |
| 0x54000057 | VROL.VV | VROL.VV vd, vs2, vs1, vm | OPIVV | Vector Rotate Left |
| 0x54004057 | VROL.VX | VROL.VX vd, vs2, rs1, vm | OPIVX | Vector Rotate Left Scalar |
| 0x50000057 | VROR.VV | VROR.VV vd, vs2, vs1, vm | OPIVV | Vector Rotate Right |
| 0x50004057 | VROR.VX | VROR.VX vd, vs2, rs1, vm | OPIVX | Vector Rotate Right Scalar |
| 0x0C003057 | VRSUB.VI | VRSUB.VI vd, vs2, imm, vm | OPIVI | Vector Reverse Subtract Immediate |
| 0x0C004057 | VRSUB.VX | VRSUB.VX vd, vs2, rs1, vm | OPIVX | Vector Integer Reverse Subtract Scalar |
| 0x84000057 | VSADD.VV | VSADD.VV vd, vs2, vs1, vm | OPIVV | Vector Saturating Integer Add |
| 0x80000057 | VSADDU.VV | VSADDU.VV vd, vs2, vs1, vm | OPIVV | Vector Saturating Integer Add Unsigned |
| 0x48000057 | VSBC.VVM | VSBC.VVM vd, vs2, vs1, v0 | OPIVV | Vector Subtract with Borrow |
| 0x00005027 | VSE16.V | VSE16.V vs3, (rs1), vm | VS-Type | Vector Store Element (16-bit) |
| 0x00006027 | VSE32.V | VSE32.V vs3, (rs1), vm | V-Store | Vector Store Element (32-bit) |
| 0x00007027 | VSE64.V | VSE64.V vs3, (rs1), vm | VS-Type | Vector Store Element (64-bit) |
| 0x00000027 | VSE8.V | VSE8.V vs3, (rs1), vm | VS-Type | Vector Store Element (8-bit) |
| 0xC0007057 | VSETIVLI | VSETIVLI rd, uimm, vtypei | V-Type | Vector Set VL Immediate |
| 0x80007057 | VSETVL | VSETVL rd, rs1, rs2 | V-Type | Vector Set VL |
| 0x00007057 | VSETVLI | VSETVLI rd, rs1, vtypei | V-Type | Vector Set VL Immediate |
| 0xBA002077 | VSHA2CH.VV | VSHA2CH.VV vd, vs2, vs1 | OPIVV | Vector SHA-2 Compress High |
| 0xBE002077 | VSHA2CL.VV | VSHA2CL.VV vd, vs2, vs1 | OPIVV | Vector SHA-2 Compress Low |
| 0xB6002077 | VSHA2MS.VV | VSHA2MS.VV vd, vs2, vs1 | OPIVV | Vector SHA-2 Message Schedule |