Vector Arithmetic Instructions
597 AMDGPU instructions in this category - showing 100 per page, page 5 of 6 - click any row for encoding, pseudocode, and full documentation.
| Mnemonic | Syntax | Format | Summary |
|---|---|---|---|
| v_max_bf16 | v_max_bf16 | VOP3 | AMDGPU VOP3 vector instruction. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| v_max_f16 | v_max_f16 | VOP2 | Select the maximum of two half-precision float inputs and store the result into a vector register. |
| v_max_f32 | v_max_f32 | VOP2 | Select the maximum of two single-precision float inputs and store the result into a vector register. |
| v_max_f64 | v_max_f64 | VOP2 | Select the maximum of two double-precision float inputs and store the selected value into a vector register. |
| v_max_i16 | v_max_i16 | VOP2 | Select the maximum of two signed 16-bit integer inputs and store the selected value into a vector register. |
| v_max_i32 | v_max_i32 | VOP2 | Select the maximum of two signed 32-bit integer inputs and store the selected value into a vector register. |
| v_max_i64 | v_max_i64 | VOP3 | AMDGPU VOP3 vector instruction operating on i64 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| v_max_legacy_f32 | v_max_legacy_f32 | VOP2 | AMDGPU VOP2 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| v_max_num_f16 | v_max_num_f16 | VOP2 | Select the IEEE maximumNumber() of two half-precision float inputs and store the selected value into a vector register. |
| v_max_num_f32 | v_max_num_f32 | VOP2 | Select the IEEE maximumNumber() of two single-precision float inputs and store the selected value into a vector register. |
| v_max_num_f64 | v_max_num_f64 | VOP2 | Select the IEEE maximumNumber() of two double-precision float inputs and store the selected value into a vector register. |
| v_max_u16 | v_max_u16 | VOP2 | Select the maximum of two unsigned 16-bit integer inputs and store the selected value into a vector register. |
| v_max_u32 | v_max_u32 | VOP2 | Select the maximum of two unsigned 32-bit integer inputs and store the selected value into a vector register. |
| v_max_u64 | v_max_u64 | VOP3 | AMDGPU VOP3 vector instruction operating on u64 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| v_maximum3_f16 | v_maximum3_f16 | VOP3 | Select the IEEE maximum() of three half-precision float inputs and store the selected value into a vector register. |
| v_maximum3_f32 | v_maximum3_f32 | VOP3 | Select the IEEE maximum() of three single-precision float inputs and store the result into a vector register. |
| v_maximum_f16 | v_maximum_f16 | VOP3 | Select the IEEE maximum() of two half-precision float inputs and store the selected value into a vector register. |
| v_maximum_f32 | v_maximum_f32 | VOP3 | Select the IEEE maximum() of two single-precision float inputs and store the selected value into a vector register. |
| v_maximum_f64 | v_maximum_f64 | VOP3 | Select the IEEE maximum() of two double-precision float inputs and store the selected value into a vector register. |
| v_maximumminimum_f16 | v_maximumminimum_f16 | VOP3 | Select the IEEE maximum() of the first two half-precision float inputs and then select the IEEE minimum() of that result and third half-precision… |
| v_maximumminimum_f32 | v_maximumminimum_f32 | VOP3 | Select the IEEE maximum() of the first two single-precision float inputs and then select the IEEE minimum() of that result and third single-precision… |
| v_maxmin_f16 | v_maxmin_f16 | VOP3 | Select the maximum of the first two half-precision float inputs and then select the minimum of that result and third half-precision float input. |
| v_maxmin_f32 | v_maxmin_f32 | VOP3 | Select the maximum of the first two single-precision float inputs and then select the minimum of that result and third single-precision float input. |
| v_maxmin_i32 | v_maxmin_i32 | VOP3 | Select the maximum of the first two signed 32-bit integer inputs and then select the minimum of that result and third signed 32-bit integer input. |
| v_maxmin_num_f16 | v_maxmin_num_f16 | VOP3 | Select the IEEE maximumNumber() of the first two half-precision float inputs and then select the IEEE minimumNumber() of that result and third… |
| v_maxmin_num_f32 | v_maxmin_num_f32 | VOP3 | Select the IEEE maximumNumber() of the first two single-precision float inputs and then select the IEEE minimumNumber() of that result and third… |
| v_maxmin_u32 | v_maxmin_u32 | VOP3 | Select the maximum of the first two unsigned 32-bit integer inputs and then select the minimum of that result and third unsigned 32-bit integer input. |
| v_mbcnt_hi_u32_b32 | v_mbcnt_hi_u32_b32 | VOP2 | For each lane 32 <= N < 64, examine the N least significant bits of the first input and count how many of those bits are "1". |
| v_mbcnt_lo_u32_b32 | v_mbcnt_lo_u32_b32 | VOP2 | For each lane 0 <= N < 32, examine the N least significant bits of the first input and count how many of those bits are "1". |
| v_med3_f16 | v_med3_f16 | VOP3 | Select the median of three half-precision float values and store the selected value into a vector register. |
| v_med3_f32 | v_med3_f32 | VOP3 | Select the median of three single-precision float values and store the selected value into a vector register. |
| v_med3_i16 | v_med3_i16 | VOP3 | Select the median of three signed 16-bit integer values and store the selected value into a vector register. |
| v_med3_i32 | v_med3_i32 | VOP3 | Select the median of three signed 32-bit integer values and store the selected value into a vector register. |
| v_med3_num_f16 | v_med3_num_f16 | VOP3 | Select the median of three half-precision float inputs and store the selected value into a vector register. |
| v_med3_num_f32 | v_med3_num_f32 | VOP3 | Select the median of three single-precision float inputs and store the selected value into a vector register. |
| v_med3_u16 | v_med3_u16 | VOP3 | Select the median of three unsigned 16-bit integer values and store the selected value into a vector register. |
| v_med3_u32 | v_med3_u32 | VOP3 | Select the median of three unsigned 32-bit integer values and store the selected value into a vector register. |
| v_min3_f16 | v_min3_f16 | VOP3 | Select the minimum of three half-precision float inputs and store the selected value into a vector register. |
| v_min3_f32 | v_min3_f32 | VOP3 | Select the minimum of three single-precision float inputs and store the selected value into a vector register. |
| v_min3_i16 | v_min3_i16 | VOP3 | Select the minimum of three signed 16-bit integer inputs and store the selected value into a vector register. |
| v_min3_i32 | v_min3_i32 | VOP3 | Select the minimum of three signed 32-bit integer inputs and store the selected value into a vector register. |
| v_min3_num_f16 | v_min3_num_f16 | VOP3 | Select the IEEE minimumNumber() of three half-precision float inputs and store the selected value into a vector register. |
| v_min3_num_f32 | v_min3_num_f32 | VOP3 | Select the IEEE minimumNumber() of three single-precision float inputs and store the selected value into a vector register. |
| v_min3_u16 | v_min3_u16 | VOP3 | Select the minimum of three unsigned 16-bit integer inputs and store the selected value into a vector register. |
| v_min3_u32 | v_min3_u32 | VOP3 | Select the minimum of three unsigned 32-bit integer inputs and store the selected value into a vector register. |
| v_min_f16 | v_min_f16 | VOP2 | Select the minimum of two half-precision float inputs and store the result into a vector register. |
| v_min_f32 | v_min_f32 | VOP2 | Select the minimum of two single-precision float inputs and store the result into a vector register. |
| v_min_f64 | v_min_f64 | VOP2 | Select the minimum of two double-precision float inputs and store the selected value into a vector register. |
| v_min_i16 | v_min_i16 | VOP2 | Select the minimum of two signed 16-bit integer inputs and store the selected value into a vector register. |
| v_min_i32 | v_min_i32 | VOP2 | Select the minimum of two signed 32-bit integer inputs and store the selected value into a vector register. |
| v_min_i64 | v_min_i64 | VOP3 | AMDGPU VOP3 vector instruction operating on i64 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| v_min_legacy_f32 | v_min_legacy_f32 | VOP2 | AMDGPU VOP2 vector instruction operating on f32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| v_min_num_f16 | v_min_num_f16 | VOP2 | Select the IEEE minimumNumber() of two half-precision float inputs and store the selected value into a vector register. |
| v_min_num_f32 | v_min_num_f32 | VOP2 | Select the IEEE minimumNumber() of two single-precision float inputs and store the selected value into a vector register. |
| v_min_num_f64 | v_min_num_f64 | VOP2 | Select the IEEE minimumNumber() of two double-precision float inputs and store the selected value into a vector register. |
| v_min_u16 | v_min_u16 | VOP2 | Select the minimum of two unsigned 16-bit integer inputs and store the selected value into a vector register. |
| v_min_u32 | v_min_u32 | VOP2 | Select the minimum of two unsigned 32-bit integer inputs and store the selected value into a vector register. |
| v_min_u64 | v_min_u64 | VOP3 | AMDGPU VOP3 vector instruction operating on u64 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| v_minimum3_f16 | v_minimum3_f16 | VOP3 | Select the IEEE minimum() of three half-precision float inputs and store the selected value into a vector register. |
| v_minimum3_f32 | v_minimum3_f32 | VOP3 | Select the IEEE minimum() of three single-precision float inputs and store the result into a vector register. |
| v_minimum_f16 | v_minimum_f16 | VOP3 | Select the IEEE minimum() of two half-precision float inputs and store the selected value into a vector register. |
| v_minimum_f32 | v_minimum_f32 | VOP3 | Select the IEEE minimum() of two single-precision float inputs and store the selected value into a vector register. |
| v_minimum_f64 | v_minimum_f64 | VOP3 | Select the IEEE minimum() of two double-precision float inputs and store the selected value into a vector register. |
| v_minimummaximum_f16 | v_minimummaximum_f16 | VOP3 | Select the IEEE minimum() of the first two half-precision float inputs and then select the IEEE maximum() of that result and third half-precision… |
| v_minimummaximum_f32 | v_minimummaximum_f32 | VOP3 | Select the IEEE minimum() of the first two single-precision float inputs and then select the IEEE maximum() of that result and third single-precision… |
| v_minmax_f16 | v_minmax_f16 | VOP3 | Select the minimum of the first two half-precision float inputs and then select the maximum of that result and third half-precision float input. |
| v_minmax_f32 | v_minmax_f32 | VOP3 | Select the minimum of the first two single-precision float inputs and then select the maximum of that result and third single-precision float input. |
| v_minmax_i32 | v_minmax_i32 | VOP3 | Select the minimum of the first two signed 32-bit integer inputs and then select the maximum of that result and third signed 32-bit integer input. |
| v_minmax_num_f16 | v_minmax_num_f16 | VOP3 | Select the IEEE minimumNumber() of the first two half-precision float inputs and then select the IEEE maximumNumber() of that result and third… |
| v_minmax_num_f32 | v_minmax_num_f32 | VOP3 | Select the IEEE minimumNumber() of the first two single-precision float inputs and then select the IEEE maximumNumber() of that result and third… |
| v_minmax_u32 | v_minmax_u32 | VOP3 | Select the minimum of the first two unsigned 32-bit integer inputs and then select the maximum of that result and third unsigned 32-bit integer input. |
| v_mov_b16 | v_mov_b16 | VOP1 | Move 16-bit data from a vector input into a vector register. |
| v_mov_b32 | v_mov_b32 | VOP1 | Move 32-bit data from a vector input into a vector register. |
| v_mov_b64 | v_mov_b64 | VOP1 | Move data from a 64-bit vector input into a vector register. |
| v_movreld_b32 | v_movreld_b32 | VOP1 | Move data from a vector input into a relatively-indexed vector register. |
| v_movrels_b32 | v_movrels_b32 | VOP1 | Move data from a relatively-indexed vector register into another vector register. |
| v_movrelsd_2_b32 | v_movrelsd_2_b32 | VOP1 | Move data from a relatively-indexed vector register into another relatively-indexed vector register, using different offsets for each index. |
| v_movrelsd_b32 | v_movrelsd_b32 | VOP1 | Move data from a relatively-indexed vector register into another relatively-indexed vector register. |
| v_mqsad_pk_u16_u8 | v_mqsad_pk_u16_u8 | VOP3 | Perform the V_MSAD_U8 operation four times using different slices of the first array, all entries of the second array and each entry of the third… |
| v_mqsad_u32_u8 | v_mqsad_u32_u8 | VOP3 | Perform the V_MSAD_U8 operation four times using different slices of the first array, all entries of the second array and each entry of the third… |
| v_msad_u8 | v_msad_u8 | VOP3 | Calculate the sum of absolute differences of elements in two packed 4-component unsigned 8-bit integer inputs, except that elements where the second… |
| v_mul_f16 | v_mul_f16 | VOP2 | Multiply two floating point inputs and store the result into a vector register. |
| v_mul_f32 | v_mul_f32 VDST, S0, S1 | VOP2 | Per-lane single-precision floating-point multiply. |
| v_mul_f64 | v_mul_f64 | VOP2 | Multiply two floating point inputs and store the result into a vector register. |
| v_mul_f64_pseudo | v_mul_f64_pseudo | VOP2 | AMDGPU VOP2 vector instruction operating on f64 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| v_mul_hi_i32 | v_mul_hi_i32 | VOP3 | Multiply two signed 32-bit integer inputs and store the high 32 bits of the result into a vector register. |
| v_mul_hi_i32_i24 | v_mul_hi_i32_i24 | VOP2 | Multiply two signed 24-bit integer inputs and store the high 32 bits of the result as a signed 32-bit integer into a vector register. |
| v_mul_hi_u32 | v_mul_hi_u32 | VOP3 | Multiply two unsigned 32-bit integer inputs and store the high 32 bits of the result into a vector register. |
| v_mul_hi_u32_u24 | v_mul_hi_u32_u24 | VOP2 | Multiply two unsigned 24-bit integer inputs and store the high 32 bits of the result as an unsigned 32-bit integer into a vector register. |
| v_mul_i32_i24 | v_mul_i32_i24 | VOP2 | Multiply two signed 24-bit integer inputs and store the result as a signed 32-bit integer into a vector register. |
| v_mul_legacy_f32 | v_mul_legacy_f32 | VOP2 | Multiply two floating point inputs and store the result into a vector register. |
| v_mul_lo_i32 | v_mul_lo_i32 | VOP3 | AMDGPU VOP3 vector instruction operating on i32 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| v_mul_lo_u16 | v_mul_lo_u16 | VOP2 | Multiply two unsigned 16-bit integer inputs and store the low bits of the result into a vector register. |
| v_mul_lo_u32 | v_mul_lo_u32 VDST, S0, S1 | VOP3 | Per-lane 32-bit unsigned multiply, low half of the product. |
| v_mul_u32_u24 | v_mul_u32_u24 | VOP2 | Multiply two unsigned 24-bit integer inputs and store the result as an unsigned 32-bit integer into a vector register. |
| v_mul_u64 | v_mul_u64 | VOP2 | AMDGPU VOP2 vector instruction operating on u64 data. (Format and name extracted from LLVM's AMDGPU backend source - semantics not yet curated.) |
| v_mullit_f32 | v_mullit_f32 | VOP3 | Multiply two floating point inputs and store the result into a vector register. |
| v_nop | v_nop | VOP1 | Do nothing. |
| v_not_b16 | v_not_b16 | VOP1 | Calculate bitwise negation on a vector input and store the result into a vector register. |
| v_not_b32 | v_not_b32 | VOP1 | Calculate bitwise negation on a vector input and store the result into a vector register. |