v_max_f32 GPU Native ISA AMD Vector

Vector Arithmetic

v_max_f32

Select the maximum of two single-precision float inputs and store the result into a vector register.

Also written as v_max_num_f32. AMD's machine-readable ISA specification lists this name for the same instruction.

Encoding

Binary Layout (AMD CDNA 4)
0
31
001011
30:25
VDST
24:17
VSRC1
16:9
SRC0
8:0
 

The ENC_VOP2 layout from AMD's machine-readable ISA specification (AMD CDNA 4). Opcode 11 in OP rebuilds 0x16000000, an identifier AMD lists for this encoding. Not the same in every generation: AMD RDNA 3.5 (opcode 16), AMD RDNA 3 (opcode 16), AMD RDNA 2 (opcode 16), AMD RDNA 1 (opcode 16). The same in AMD CDNA 3, AMD CDNA 2, AMD CDNA 1.

Format VOP2
Width 32 bits
Opcode 11
Identifier 0x16000000

Operands

  • VDST
    Written. N/A Data format: N/A (OPR_VGPR, FMT_NUM_F32)
  • SRC0
    Read. N/A Data format: N/A (OPR_SRC, FMT_NUM_F32)
  • VSRC1
    Read. N/A Data format: N/A (OPR_VGPR, FMT_NUM_F32)

In AMD's order, as its machine-readable ISA specification lists them for the ENC_VOP2 encoding (AMD CDNA 4).

GFX Target Compatibility

TargetSupport
gfx1100✅ Supported

Related PTX Concepts

Maximum ↗
equivalent with restrictions
max (PTX)

Related

More in Vector Arithmetic

Reference

AMDGPU / GFX ISA

Semantics

if (WAVE_MODE.IEEE && isSignalNAN(64'F(S0.f32))) then D0.f32 = 32'F(cvtToQuietNAN(64'F(S0.f32))) elsif (WAVE_MODE.IEEE && isSignalNAN(64'F(S1.f32))) then D0.f32 = 32'F(cvtToQuietNAN(64'F(S1.f32))) elsif isNAN(64'F(S0.f32)) then D0.f32 = S1.f32 elsif isNAN(64'F(S1.f32)) then D0.f32 = S0.f32 elsif ((64'F(S0.f32) == +0.0) && (64'F(S1.f32) == -0.0)) then D0.f32 = S0.f32 elsif ((64'F(S0.f32) == -0.0) && (64'F(S1.f32) == +0.0)) then D0.f32 = S1.f32 elsif WAVE_MODE.IEEE then D0.f32 = S0.f32 >= S1.f32 ? S0.f32 : S1.f32 else D0.f32 = S0.f32 > S1.f32 ? S0.f32 : S1.f32 endif

Example

v_max_f32 v5, -1, v2

A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite. Not from an AMD document, and not authored here.

Sources