v_mov_b64 GPU Native ISA AMD Vector

V MOV B64 Vector Arithmetic

v_mov_b64

Move data from a 64-bit vector input into a vector register.

Encoding

Verified bit-level encoding data is not yet available for this instruction. The instruction-format classification below (VOP1) is well-documented and stable; exact per-target opcode/field bit positions have not yet been imported from a verified source.
Format VOP1
Execution Unit

Operands

Operand details have not yet been curated for this instruction.

GFX Target Compatibility

Per-target GFX compatibility has not yet been verified for this instruction.

Floating-point modifiers are valid for this instruction if S0.u64 is a 64-bit floating point value. This instruction is suitable for negating or taking the absolute value of a floating-point value.

Related

More in Vector Arithmetic

Reference

AMDGPU / GFX ISA

Semantics

D0.b64 = S0.b64

Sources