adclt

Add with Carry Long (Top) (SVE2)

ADCLT <Zda>.<T>, <Zn>.<T>, <Zm>.<T>

Adds top halves with carry.

Pseudocode Operation

No pseudocode available.

Encoding

Binary Layout

01000101

31:24

20:16

11010

15:11

9:5

Zda

4:0

Format SVE2 Math

Opcode 0x4500D400

Extension SVE2

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x4500D400	ADCLT <Zda>.<T>, <Zn>.<T>, <Zm>.<T>		A64		01000101 \| 0 \| sz \| 0 \| Zm \| 11010 \| 1 \| Zn \| Zda

Description

Add the odd-numbered elements of the first source vector and the 1-bit carry from the least-significant bit of the odd-numbered elements of the second source vector to the even-numbered elements of the destination and accumulator vector. The 1-bit carry output is placed in the corresponding odd-numbered element of the destination vector.

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer pairs = VL DIV (esize * 2);
bits(VL) operand = Z[n, VL];
bits(VL) carries = Z[m, VL];
bits(VL) result = Z[da, VL];

for p = 0 to pairs-1
    bits(esize) element1 = Elem[result, 2*p + 0, esize];
    bits(esize) element2 = Elem[operand, 2*p + 1, esize];
    bit carry_in = Elem[carries, 2*p + 1, esize]<0>;

    (res, nzcv) = AddWithCarry(element1, element2, carry_in);
    carry_out = nzcv<1>;

    Elem[result, 2*p + 0, esize] = res;
    Elem[result, 2*p + 1, esize] = ZeroExtend(carry_out, esize);

Z[da, VL] = result;