s_waitcnt_lgkmcnt GPU Native ISA AMD Scalar
S WAITCNT LGKMCNT Scalar Arithmetic
s_waitcnt_lgkmcnt
Wait for the LGKMCNT counter to be at or below the specified level.
Encoding
Verified bit-level encoding data is not yet available for this instruction.
The instruction-format classification below (SOPK)
is well-documented and stable; exact per-target opcode/field bit positions have not
yet been imported from a verified source.
Operands
Operand details have not yet been curated for this instruction.
GFX Target Compatibility
| Target | Support |
|---|---|
| gfx1100 | ✅ Supported |
Related
More in Scalar Arithmetic
Reference
AMDGPU / GFX ISA
Description
Wait for the LGKMCNT counter to be at or below the specified level. The LGKMCNT counter tracks the number of outstanding local data share (L), global data share (G), scalar memory (K) and message (M) events.
Example
s_waitcnt_lgkmcnt null, 0x1234A real instruction accepted by the LLVM assembler, taken verbatim from LLVM's own AMDGPU MC test suite (gfx11). Not from an AMD document, and not authored here.
Sources
- User Guide for AMDGPU Backend ↗ - LLVM Project
- AMD Machine-Readable GPU ISA Specification ↗ - Advanced Micro Devices, Inc.
- LLVM MC assembler tests for AMDGPU (gfx11) ↗ - LLVM Project