sshllb

SSHLLB <Zd>.<T>, <Zn>.<Tb>, #<const>

Signed Shift Left Long (Bottom)

Pseudocode Operation

No pseudocode available.

Encoding

Binary Layout

010001010

31:23

tszh

tszl

20:19

imm3

18:16

1010

15:12

9:5

4:0

Format SVE2

Opcode 0x4500A000

Extension SVE2

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x4500A000	SSHLLB <Zd>.<T>, <Zn>.<Tb>, #<const>		A64		010001010 \| tszh \| 0 \| tszl \| imm3 \| 1010 \| 0 \| 0 \| Zn \| Zd

Description

Shift left by immediate each even-numbered signed element of the source vector, and place the results in the overlapping double-width elements of the destination vector. The immediate shift amount is an unsigned value in the range 0 to number of bits per element minus 1. This instruction is unpredicated.

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV (2 * esize);
bits(VL) operand = Z[n, VL];
bits(VL) result;

for e = 0 to elements-1
    bits(esize) element = Elem[operand, 2*e + 0, esize];
    integer shifted_value = SInt(element) << shift;
    Elem[result, e, 2*esize] = shifted_value<2*esize-1:0>;

Z[d, VL] = result;